鍨嬭櫉锛� | XC5VLX50-2FFG324I |
寤犲晢锛� | Xilinx Inc |
鏂囦欢闋佹暩锛� | 34/91闋� |
鏂囦欢澶�?銆�?/td> | 0K |
鎻忚堪锛� | IC FPGA VIRTEX-5 50K 324FBGA |
妯欐簴鍖呰锛� | 1 |
绯诲垪锛� | Virtex®-5 LX |
LAB/CLB鏁革細 | 3600 |
閭忚集鍏冧欢/鍠厓鏁革細 | 46080 |
RAM 浣嶇附瑷堬細 | 1769472 |
杓稿叆/杓稿嚭鏁革細 | 220 |
闆绘簮闆诲锛� | 0.95 V ~ 1.05 V |
瀹夎椤炲瀷锛� | 琛ㄩ潰璨艰 |
宸ヤ綔婧害锛� | -40°C ~ 100°C |
灏佽/澶栨锛� | 324-BBGA锛孎CBGA |
渚涙噳鍟嗚ō鍌欏皝瑁濓細 | 324-FCBGA锛�19x19锛� |
閰嶇敤锛� | 568-5088-ND - BOARD DEMO DAC1408D750 HW-V5-ML561-UNI-G-ND - EVALUATION PLATFORM VIRTEX-5 HW-V5-ML550-UNI-G-ND - EVALUATION PLATFORM VIRTEX-5 HW-V5-ML521-UNI-G-ND - EVALUATION PLATFORM VIRTEX-5 HW-AFX-FF324-500-G-ND - BOARD DEV VIRTEX 5 FF324 HW-V5GBE-DK-UNI-G-ND - KIT DEV V5 LXT GIGABIT ETHERNET 122-1508-ND - EVALUATION PLATFORM VIRTEX-5 |
鐩搁棞PDF璩囨枡 |
PDF鎻忚堪 |
---|---|
BR93L56-W | IC EEPROM 2KBIT 2MHZ 8DIP |
XC5VLX50-2FF324I | IC FPGA VIRTEX-5 50K 324FBGA |
XC4VFX40-10FFG1152C | IC FPGA VIRTEX-4 FX 40K 1152FBGA |
XC4VLX40-10FF1148I | IC FPGA VIRTEX-4LX 1148FFBGA |
XC5VLX50T-1FF665C | IC FPGA VIRTEX-5 50K 665FCBGA |
鐩搁棞浠g悊鍟�/鎶€琛撳弮鏁� |
鍙冩暩鎻忚堪 |
---|---|
XC5VLX50-2FFG676C | 鍔熻兘鎻忚堪:IC FPGA VIRTEX-5 50K 676-FBGA RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 宓屽叆寮� - FPGA锛堢従鍫村彲绶ㄧ▼闁€闄e垪锛� 绯诲垪:Virtex®-5 LX 鐢㈠搧璁婂寲閫氬憡:Step Intro and Pkg Change 11/March/2008 妯欐簴鍖呰:1 绯诲垪:Virtex®-5 SXT LAB/CLB鏁�:4080 閭忚集鍏冧欢/鍠厓鏁�:52224 RAM 浣嶇附瑷�:4866048 杓稿叆/杓稿嚭鏁�:480 闁€鏁�:- 闆绘簮闆诲:0.95 V ~ 1.05 V 瀹夎椤炲瀷:琛ㄩ潰璨艰 宸ヤ綔婧害:-40°C ~ 100°C 灏佽/澶栨:1136-BBGA锛孎CBGA 渚涙噳鍟嗚ō鍌欏皝瑁�:1136-FCBGA 閰嶇敤:568-5088-ND - BOARD DEMO DAC1408D750122-1796-ND - EVALUATION PLATFORM VIRTEX-5 |
XC5VLX50-2FFG676I | 鍔熻兘鎻忚堪:IC FPGA VIRTEX-5 50K 676-FBGA RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 宓屽叆寮� - FPGA锛堢従鍫村彲绶ㄧ▼闁€闄e垪锛� 绯诲垪:Virtex®-5 LX 鐢㈠搧璁婂寲閫氬憡:Step Intro and Pkg Change 11/March/2008 妯欐簴鍖呰:1 绯诲垪:Virtex®-5 SXT LAB/CLB鏁�:4080 閭忚集鍏冧欢/鍠厓鏁�:52224 RAM 浣嶇附瑷�:4866048 杓稿叆/杓稿嚭鏁�:480 闁€鏁�:- 闆绘簮闆诲:0.95 V ~ 1.05 V 瀹夎椤炲瀷:琛ㄩ潰璨艰 宸ヤ綔婧害:-40°C ~ 100°C 灏佽/澶栨:1136-BBGA锛孎CBGA 渚涙噳鍟嗚ō鍌欏皝瑁�:1136-FCBGA 閰嶇敤:568-5088-ND - BOARD DEMO DAC1408D750122-1796-ND - EVALUATION PLATFORM VIRTEX-5 |
XC5VLX50-3FF1153C | 鍔熻兘鎻忚堪:IC FPGA VIRTEX-5 50K 1153FBGA RoHS:鍚� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 宓屽叆寮� - FPGA锛堢従鍫村彲绶ㄧ▼闁€闄e垪锛� 绯诲垪:Virtex®-5 LX 鐢㈠搧璁婂寲閫氬憡:Step Intro and Pkg Change 11/March/2008 妯欐簴鍖呰:1 绯诲垪:Virtex®-5 SXT LAB/CLB鏁�:4080 閭忚集鍏冧欢/鍠厓鏁�:52224 RAM 浣嶇附瑷�:4866048 杓稿叆/杓稿嚭鏁�:480 闁€鏁�:- 闆绘簮闆诲:0.95 V ~ 1.05 V 瀹夎椤炲瀷:琛ㄩ潰璨艰 宸ヤ綔婧害:-40°C ~ 100°C 灏佽/澶栨:1136-BBGA锛孎CBGA 渚涙噳鍟嗚ō鍌欏皝瑁�:1136-FCBGA 閰嶇敤:568-5088-ND - BOARD DEMO DAC1408D750122-1796-ND - EVALUATION PLATFORM VIRTEX-5 |
XC5VLX50-3FF324C | 鍔熻兘鎻忚堪:IC FPGA VIRTEX-5 50K 324FBGA RoHS:鍚� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 宓屽叆寮� - FPGA锛堢従鍫村彲绶ㄧ▼闁€闄e垪锛� 绯诲垪:Virtex®-5 LX 鐢㈠搧璁婂寲閫氬憡:Step Intro and Pkg Change 11/March/2008 妯欐簴鍖呰:1 绯诲垪:Virtex®-5 SXT LAB/CLB鏁�:4080 閭忚集鍏冧欢/鍠厓鏁�:52224 RAM 浣嶇附瑷�:4866048 杓稿叆/杓稿嚭鏁�:480 闁€鏁�:- 闆绘簮闆诲:0.95 V ~ 1.05 V 瀹夎椤炲瀷:琛ㄩ潰璨艰 宸ヤ綔婧害:-40°C ~ 100°C 灏佽/澶栨:1136-BBGA锛孎CBGA 渚涙噳鍟嗚ō鍌欏皝瑁�:1136-FCBGA 閰嶇敤:568-5088-ND - BOARD DEMO DAC1408D750122-1796-ND - EVALUATION PLATFORM VIRTEX-5 |
XC5VLX50-3FF676C | 鍔熻兘鎻忚堪:IC FPGA VIRTEX-5 50K 676FBGA RoHS:鍚� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 宓屽叆寮� - FPGA锛堢従鍫村彲绶ㄧ▼闁€闄e垪锛� 绯诲垪:Virtex®-5 LX 鐢㈠搧璁婂寲閫氬憡:Step Intro and Pkg Change 11/March/2008 妯欐簴鍖呰:1 绯诲垪:Virtex®-5 SXT LAB/CLB鏁�:4080 閭忚集鍏冧欢/鍠厓鏁�:52224 RAM 浣嶇附瑷�:4866048 杓稿叆/杓稿嚭鏁�:480 闁€鏁�:- 闆绘簮闆诲:0.95 V ~ 1.05 V 瀹夎椤炲瀷:琛ㄩ潰璨艰 宸ヤ綔婧害:-40°C ~ 100°C 灏佽/澶栨:1136-BBGA锛孎CBGA 渚涙噳鍟嗚ō鍌欏皝瑁�:1136-FCBGA 閰嶇敤:568-5088-ND - BOARD DEMO DAC1408D750122-1796-ND - EVALUATION PLATFORM VIRTEX-5 |