參數(shù)資料
      型號(hào): XC4052XL-1BG432I
      廠商: Xilinx Inc
      文件頁數(shù): 6/68頁
      文件大小: 0K
      描述: IC FPGA I-TEMP 3.3V 1SPD 432MBGA
      產(chǎn)品變化通告: XC4000(XL,XLA,E) Discontinuation 15/Nov/2004
      標(biāo)準(zhǔn)包裝: 21
      系列: XC4000E/X
      LAB/CLB數(shù): 1936
      邏輯元件/單元數(shù): 4598
      RAM 位總計(jì): 61952
      輸入/輸出數(shù): 352
      門數(shù): 52000
      電源電壓: 3 V ~ 3.6 V
      安裝類型: 表面貼裝
      工作溫度: -40°C ~ 100°C
      封裝/外殼: 432-LBGA,金屬
      供應(yīng)商設(shè)備封裝: 432-MBGA(40x40)
      R
      XC4000E and XC4000X Series Field Programmable Gate Arrays
      6-18
      May 14, 1999 (Version 1.6)
      Fast Carry Logic
      Each CLB F and G function generator contains dedicated
      arithmetic logic for the fast generation of carry and borrow
      signals. This extra output is passed on to the function gen-
      erator in the adjacent CLB. The carry chain is independent
      of normal routing resources.
      Dedicated fast carry logic greatly increases the efciency
      and performance of adders, subtractors, accumulators,
      comparators and counters. It also opens the door to many
      new applications involving arithmetic operation, where the
      previous generations of FPGAs were not fast enough or too
      inefcient. High-speed address offset calculations in micro-
      processor or graphics systems, and high-speed addition in
      digital signal processing are two typical applications.
      The two 4-input function generators can be congured as a
      2-bit adder with built-in hidden carry that can be expanded
      to any length. This dedicated carry circuitry is so fast and
      efcient that conventional speed-up methods like carry
      generate/propagate are meaningless even at the 16-bit
      level, and of marginal benet at the 32-bit level.
      This fast carry logic is one of the more signicant features
      of the XC4000 Series, speeding up arithmetic and counting
      into the 70 MHz range.
      The carry chain in XC4000E devices can run either up or
      down. At the top and bottom of the columns where there
      are no CLBs above or below, the carry is propagated to the
      right. (See Figure 11.) In order to improve speed in the
      high-capacity XC4000X devices, which can potentially
      have very long carry chains, the carry chain travels upward
      only, as shown in Figure 12. Additionally, standard intercon-
      nect can be used to route a carry signal in the downward
      direction.
      Figure 13 on page 19 shows an XC4000E CLB with dedi-
      cated fast carry logic. The carry logic in the XC4000X is
      similar, except that COUT exits at the top only, and the sig-
      nal CINDOWN does not exist. As shown in Figure 13, the
      carry logic shares operand and control inputs with the func-
      tion generators. The carry outputs connect to the function
      generators, where they are combined with the operands to
      form the sums.
      Figure 14 on page 20 shows the details of the carry logic
      for the XC4000E. This diagram shows the contents of the
      box labeled “CARRY LOGIC” in Figure 13. The XC4000X
      carry logic is very similar, but a multiplexer on the
      pass-through carry chain has been eliminated to reduce
      delay. Additionally, in the XC4000X the multiplexer on the
      G4 path has a memory-programmable 0 input, which per-
      mits G4 to directly connect to COUT. G4 thus becomes an
      additional high-speed initialization path for carry-in.
      The dedicated carry logic is discussed in detail in Xilinx
      document XAPP 013: “
      Using the Dedicated Carry Logic in
      XC4000.” This discussion also applies to XC4000E
      devices, and to XC4000X devices when the minor logic
      changes are taken into account.
      The fast carry logic can be accessed by placing special
      library symbols, or by using Xilinx Relationally Placed Mac-
      ros (RPMs) that already include these symbols.
      X6687
      CLB
      Figure 11: Available XC4000E Carry Propagation
      Paths
      X6610
      CLB
      Figure 12: Available XC4000X Carry Propagation
      Paths (dotted lines use general interconnect)
      Product Obsolete or Under Obsolescence
      相關(guān)PDF資料
      PDF描述
      65801-021 CLINCHER RECEPTACLE ASS'-Y-TIN
      ABB66DHBN-S621 CONN EDGECARD 132PS R/A .050 SLD
      ABB66DHBD-S621 CONN EDGECARD 132PS R/A .050 SLD
      XC4052XL-1BG432C IC FPGA C-TEMP 3.3V 1SPD 432MBGA
      65801-130LF CLINCHER RECEPTACLE ASSY TIN
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