參數(shù)資料
型號： XC3S1400AN-4FGG484I
廠商： Xilinx Inc
文件頁數(shù)： 34/123頁
文件大?。?/td> 0K
描述： IC FPGA SPARTAN-3AN 484FPGA
標準包裝： 60
系列： Spartan®-3AN
LAB/CLB數(shù)： 2816
邏輯元件/單元數(shù)： 25344
RAM 位總計： 589824
輸入/輸出數(shù)： 372
門數(shù)： 1400000
電源電壓： 1.14 V ~ 1.26 V
安裝類型： 表面貼裝
工作溫度： -40°C ~ 100°C
封裝/外殼： 484-BBGA
供應商設備封裝： 484-FBGA
Spartan-3AN FPGA Family: DC and Switching Characteristics
DS557 (v4.1) April 1, 2011
Product Specification
18
Table 14: DC Characteristics of User I/Os Using
Single-Ended Standards
IOSTANDARD
Attribute
Test
Conditions
Logic Level
Characteristics
IOL
(mA)
IOH
(mA)
VOL
Max (V)
VOH
Min (V)
LVTTL(3)
22
–2
0.4
2.4
44
–4
66
–6
88
–8
12
–12
16
–16
24
–24
LVCMOS33(3)
22
–2
0.4
VCCO – 0.4
44
–4
66
–6
88
–8
12
–12
16
–16
24
–24
LVCMOS25(3)
22
–2
0.4
VCCO – 0.4
44
–4
66
–6
88
–8
12
–12
16
–16
24
–24
LVCMOS18(3)
22
–2
0.4
VCCO – 0.4
44
–4
66
–6
88
–8
12
–12
16
–16
LVCMOS15(3)
22
–2
0.4
VCCO – 0.4
44
–4
66
–6
8–8
12
–12
LVCMOS12(3)
22
–2
0.4
VCCO – 0.4
4–4
6–6
PCI33_3(4)
1.5
–0.5
10% VCCO
90% VCCO
PCI66_3(4)
1.5
–0.5
10% VCCO
90% VCCO
8–8
0.4
VCCO - 0.4
24
–8
0.4
VCCO - 0.4
HSTL_I_18
8
–8
0.4
VCCO - 0.4
HSTL_II_18(5)
16
–16
0.4
VCCO - 0.4
HSTL_III_18
24
–8
0.4
VCCO - 0.4
SSTL18_I
6.7
–6.7
VTT – 0.475 VTT + 0.475
SSTL18_II(5)
13.4
–13.4 VTT – 0.603
VTT + 0.603
SSTL2_I
8.1
–8.1
VTT – 0.61
VTT + 0.61
SSTL2_II(5)
16.2
–16.2
VTT – 0.81
VTT + 0.81
SSTL3_I
8
–8
VTT – 0.6
VTT + 0.6
SSTL3_II
16
–16
VTT – 0.8
VTT + 0.8
Notes:
1.
The numbers in this table are based on the conditions set forth in
2.
Descriptions of the symbols used in this table are as follows:
IOL – the output current condition under which VOL is tested
IOH – the output current condition under which VOH is tested
VOL – the output voltage that indicates a Low logic level
VOH – the output voltage that indicates a High logic level
VCCO – the supply voltage for output drivers
VTT – the voltage applied to a resistor termination
3.
For the LVCMOS and LVTTL standards: the same VOL and VOH
limits apply for the Fast, Slow and QUIETIO slew attributes.
4.
Tested according to the relevant PCI specifications. For
information on PCI IP solutions, see www.xilinx.com/products/
PCIX IOSTANDARD is available and has equivalent
characteristics but no PCI-X IP is supported.
5.
These higher-drive output standards are supported only on
FPGA banks 1 and 3. Inputs are unrestricted. See the chapter
“Using I/O Resources” in UG331.
Table 14: DC Characteristics of User I/Os Using
Single-Ended Standards (Cont’d)
IOSTANDARD
Attribute
Test
Conditions
Logic Level
Characteristics
IOL
(mA)
IOH
(mA)
VOL
Max (V)
VOH
Min (V)
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