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Spartan-3E FPGA Family: Pinout Descriptions
DS312 (v4.1) July 19, 2013
Product Specification
159
Package Overview
Table 125 shows the eight low-cost, space-saving
production package styles for the Spartan-3E family. Each
package style is available as a standard and an
environmentally friendly lead-free (Pb-free) option. The
Pb-free packages include an extra ‘G’ in the package style
name. For example, the standard “VQ100” package
becomes “VQG100” when ordered as the Pb-free option.
The mechanical dimensions of the standard and Pb-free
packages are similar, as shown in the mechanical drawings
Not all Spartan-3E densities are available in all packages.
For a specific package, however, there is a common
footprint that supports all the devices available in that
package. See the footprint diagrams that follow.
For additional package information, see
UG112: Device
Package User Guide.
Selecting the Right Package Option
Spartan-3E FPGAs are available in both quad-flat pack
(QFP) and ball grid array (BGA) packaging options. While
QFP packaging offers the lowest absolute cost, the BGA
packages are superior in almost every other aspect, as
recommends using BGA packaging whenever possible.
Table 125: Spartan-3E Family Package Options
Package
Leads
Type
Maximum
I/O
Lead
Pitch
(mm)
Footprint
Area (mm)
Height
(mm)
(g)
VQ100 / VQG100
100
Very-thin Quad Flat Pack (VQFP)
66
0.5
16 x 16
1.20
0.6
CP132 / CPG132
132
Chip-Scale Package (CSP)
92
0.5
8.1 x 8.1
1.10
0.1
TQ144 / TQG144
144
Thin Quad Flat Pack (TQFP)
108
0.5
22 x 22
1.60
1.4
PQ208 / PQG208
208
Plastic Quad Flat Pack (PQFP)
158
0.5
30.6 x 30.6
4.10
5.3
FT256 / FTG256
256
Fine-pitch, Thin Ball Grid Array (FBGA)
190
1.0
17 x 17
1.55
0.9
FG320 / FGG320
320
Fine-pitch Ball Grid Array (FBGA)
250
1.0
19 x 19
2.00
1.4
FG400 / FGG400
400
Fine-pitch Ball Grid Array (FBGA)
304
1.0
21 x 21
2.43
2.2
FG484 / FGG484
484
Fine-pitch Ball Grid Array (FBGA)
376
1.0
23 x 23
2.60
2.2
Notes:
1.
Package mass is
±10%.
Table 126: QFP and BGA Comparison
Characteristic
Quad Flat Pack (QFP)
Ball Grid Array (BGA)
Maximum User I/O
158
376
Packing Density (Logic/Area)
Good
Better
Signal Integrity
Fair
Better
Simultaneous Switching Output (SSO) Support
Fair
Better
Thermal Dissipation
Fair
Better
Minimum Printed Circuit Board (PCB) Layers
4
4-6
Hand Assembly/Rework
Possible
Difficult