參數(shù)資料
型號(hào): XC2S50E-6TQ144C
廠商: Xilinx Inc
文件頁(yè)數(shù): 84/108頁(yè)
文件大?。?/td> 0K
描述: IC FPGA 1.8V 384 CLB'S 144-TQFP
產(chǎn)品變化通告: FPGA Family Discontinuation 18/Apr/2011
標(biāo)準(zhǔn)包裝: 60
系列: Spartan®-IIE
LAB/CLB數(shù): 384
邏輯元件/單元數(shù): 1728
RAM 位總計(jì): 32768
輸入/輸出數(shù): 102
門(mén)數(shù): 50000
電源電壓: 1.71 V ~ 1.89 V
安裝類(lèi)型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 144-LQFP
供應(yīng)商設(shè)備封裝: 144-TQFP(20x20)
其它名稱(chēng): 122-1204
DS077-4 (v3.0) August 9, 2013
77
Product Specification
Spartan-IIE FPGA Family: Pinout Tables
R
— OBSOLETE — OBSOLETE — OBSOLETE — OBSOLETE —
M0
-
AA1
-
M0
M2
-
AB2
-
M2
I/O, L#N_Y
5
AA3
XC2S150E,
200E, 300E,
400E, 600E
-
I/O,
L84N_Y
I/O,
L89N_Y
I/O,
L89N_Y
I/O,
L89N_Y
I/O,
L89N_Y
I/O, L#P_Y
5
AB3
XC2S150E,
200E, 300E,
400E, 600E
-
I/O, L84P_Y I/O, L89P_Y I/O, L89P_Y I/O, L89P_Y I/O, L89P_Y
I/O
5
AB4
-
I/O
5
AA5
XC2S100E,
150E
-
I/O,
L63N_Y
I/O,
L83N_Y
I/O
I/O, L#N_Y
5
W5
XC2S100E,
150E, 200E,
300E, 400E,
600E
-
I/O, L63P_Y I/O, L83P_Y
I/O,
L88N_Y
I/O,
L88N_Y
I/O,
L88N_Y
I/O,
L88N_Y
I/O, L#P_Y
5
Y5
XC2S200E,
300E, 400E,
600E
-
I/O
I/O, L88P_Y I/O, L88P_Y I/O, L88P_Y I/O, L88P_Y
I/O, L#N_Y
5
AB5
XC2S100E,
200E, 300E,
400E, 600E
XC2S200E,
300E,
400E, 600E
I/O,
L62N_Y
I/O, L82N
I/O, VREF
Bank 5,
L87N_Y
I/O, VREF
Bank 5,
L87N_Y
I/O, VREF
Bank 5,
L87N_Y
I/O, VREF
Bank 5,
L87N_Y
I/O, L#P_Y
5
AB6
XC2S100E,
200E, 300E,
400E, 600E
-
I/O, L62P_Y
I/O, L82P
I/O, L87P_Y I/O, L87P_Y I/O, L87P_Y I/O, L87P_Y
I/O
5
Y6
-
I/O
5
AA6
-
I/O
I/O,
L#N_YY
5
V6
All
-
I/O,
L61N_YY
I/O,
L81N_YY
I/O,
L86N_YY
I/O,
L86N_YY
I/O,
L86N_YY
I/O,
L86N_YY
I/O,
L#P_YY
5
W6
All
-
I/O,
L61P_YY
I/O,
L81P_YY
I/O,
L86P_YY
I/O,
L86P_YY
I/O,
L86P_YY
I/O,
L86P_YY
I/O, VREF
Bank 5,
L#N_YY
5
AB7
All
I/O, VREF
Bank 5,
L60N_YY
I/O, VREF
Bank 5,
L80N_YY
I/O, VREF
Bank 5,
L85N_YY
I/O, VREF
Bank 5,
L85N_YY
I/O, VREF
Bank 5,
L85N_YY
I/O, VREF
Bank 5,
L85N_YY
I/O,
L#P_YY
5
AA7
All
-
I/O,
L60P_YY
I/O,
L80P_YY
I/O,
L85P_YY
I/O,
L85P_YY
I/O,
L85P_YY
I/O,
L85P_YY
I/O
5
Y7
-
I/O
I/O, L#N_Y
5
V7
XC2S300E,
600E
-
I/O, L79N
I/O, L84N
I/O,
L84N_Y
I/O, L84N
I/O,
L84N_Y
I/O, L#P_Y
5
W7
XC2S300E,
600E
-
I/O
I/O, L79P
I/O, L84P
I/O, L84P_Y
I/O, L84P
I/O, L84P_Y
I/O, L#N_Y
5
AB8
XC2S100E,
300E, 600E
XC2S600E
I/O,
L59N_Y
I/O, L78N
I/O, L83N
I/O,
L83N_Y
I/O, L83N
I/O, VREF
Bank 5,
L83N_Y
I/O, L#P_Y
5
AA8
XC2S100E,
300E, 600E
-
I/O, L59P_Y
I/O, L78P
I/O, L83P
I/O, L83P_Y
I/O, L83P
I/O, L83P_Y
I/O
5
Y8
-
I/O
FG456 Pinouts (XC2S100E, XC2S150E, XC2S200E, XC2S300E, XC2S400E, XC2S600E)
Pad Name
Pin
LVDS
Async.
Output
Option
VREF
Option
Device-Specific Pinouts: XC2S
Function
Bank
100E
150E
200E
300E
400E
600E
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