參數(shù)資料
型號: XC2S100-5TQ144I
廠商: Xilinx Inc
文件頁數(shù): 44/99頁
文件大?。?/td> 0K
描述: IC FPGA 2.5V I-TEMP 144-TQFP
標準包裝: 60
系列: Spartan®-II
LAB/CLB數(shù): 600
邏輯元件/單元數(shù): 2700
RAM 位總計: 40960
輸入/輸出數(shù): 92
門數(shù): 100000
電源電壓: 2.375 V ~ 2.625 V
安裝類型: 表面貼裝
工作溫度: -40°C ~ 100°C
封裝/外殼: 144-LQFP
供應商設備封裝: 144-TQFP(20x20)
Spartan-II FPGA Family: Functional Description
DS001-2 (v2.8) June 13, 2008
Module 2 of 4
Product Specification
49
R
LVTTL
LVTTL requires no termination. DC voltage specifications
appears in Table 32 for the LVTTL standard. See "DC
Specifications" in Module 3 for the actual FPGA
characteristics.
LVCMOS2
LVCMOS2 requires no termination. DC voltage
specifications appear in Table 33 for the LVCMOS2
standard. See "DC Specifications" in Module 3 for the actual
FPGA characteristics.
AGP-2X
The specification for the AGP-2X standard does not
document a recommended termination technique. DC
voltage specifications appear in Table 34 for the AGP-2X
standard. See "DC Specifications" in Module 3 for the actual
FPGA characteristics.
For design examples and more information on using the I/O,
see XAPP179, Using SelectIO Interfaces in Spartan-II and
Spartan-IIE FPGAs.
Table 32: LVTTL Voltage Specifications
Parameter
Min
Typ
Max
VCCO
3.0
3.3
3.6
VREF
--
-
VTT
--
-
VIH
2.0
-
5.5
VIL
–0.5
-
0.8
VOH
2.4
-
VOL
--
0.4
IOH at VOH (mA)
–24
-
IOL at VOL (mA)
24
-
Notes:
1.
VOL and VOH for lower drive currents sample tested.
Table 33: LVCMOS2 Voltage Specifications
Parameter
Min
Typ
Max
VCCO
2.3
2.5
2.7
VREF
--
-
VTT
--
-
VIH
1.7
-
5.5
VIL
–0.5
-
0.7
VOH
1.9
-
VOL
--
0.4
IOH at VOH (mA)
–12
-
IOL at VOL (mA)
12
-
Table 34: AGP-2X Voltage Specifications
Parameter
Min
Typ
Max
VCCO
3.0
3.3
3.6
VREF = N × VCCO(1)
1.17
1.32
1.48
VTT
--
-
VIH ≥ VREF + 0.2
1.37
1.52
-
VIL ≤ VREF – 0.2
-
1.12
1.28
VOH ≥ 0.9 × VCCO
2.7
3.0
-
VOL ≤ 0.1 × VCCO
-0.33
0.36
IOH at VOH (mA)
Note 2
-
IOL at VOL (mA)
Note 2
-
Notes:
1.
N must be greater than or equal to 0.39 and less than or
equal to 0.41.
2.
Tested according to the relevant specification.
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