參數(shù)資料
型號(hào): XA3SD3400A-4CSG484I
廠商: Xilinx Inc
文件頁(yè)數(shù): 29/58頁(yè)
文件大小: 0K
描述: SPARTAN-3ADSP FPGA 3400K 484CSBG
產(chǎn)品培訓(xùn)模塊: Extended Spartan 3A FPGA Family
標(biāo)準(zhǔn)包裝: 84
系列: Spartan®-3A DSP XA
LAB/CLB數(shù): 5968
邏輯元件/單元數(shù): 53712
RAM 位總計(jì): 2322432
輸入/輸出數(shù): 309
門(mén)數(shù): 3400000
電源電壓: 1.14 V ~ 1.26 V
安裝類(lèi)型: 表面貼裝
工作溫度: -40°C ~ 100°C
封裝/外殼: 484-FBGA,CSPBGA
供應(yīng)商設(shè)備封裝: 484-CSPBGA
XA Spartan-3A DSP Automotive FPGA Family Data Sheet
DS705 (v2.0) April 18, 2011
Product Specification
35
LVCMOS15
Slow
2
55
4
31
6
18
8
–15
12
–10
Fast
2
25
4
10
6
66
8
–4
12
–3
QuietIO
2
70
4
40
6
31
8
–31
12
–20
LVCMOS12
Slow
2
40
4
–25
6
–18
Fast
2
31
4
–13
6
–9
QuietIO
2
55
4
–36
6
–36
PCI33_3
16
HSTL_I
–20
HSTL_III
–8
HSTL_I_18
17
HSTL_II_18
–5
HSTL_III_18
10
8
SSTL18_I
715
SSTL18_II
–9
SSTL2_I
18
SSTL2_II
–9
SSTL3_I
810
SSTL3_II
67
Table 29: Recommended Number of Simultaneously Switching Outputs per VCCO/GND Pair (VCCAUX=3.3V) (Cont’d)
Signal Standard (IOSTANDARD)
Package Type: CSG484 and FGG676
Top, Bottom (Banks 0,2)
Left, Right (Banks 1,3)
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XA3SD3400A-4FGG676I 功能描述:SPARTAN-3ADSP FPGA 3400K 676FBGA RoHS:是 類(lèi)別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場(chǎng)可編程門(mén)陣列) 系列:Spartan®-3A DSP XA 產(chǎn)品變化通告:Step Intro and Pkg Change 11/March/2008 標(biāo)準(zhǔn)包裝:1 系列:Virtex®-5 SXT LAB/CLB數(shù):4080 邏輯元件/單元數(shù):52224 RAM 位總計(jì):4866048 輸入/輸出數(shù):480 門(mén)數(shù):- 電源電壓:0.95 V ~ 1.05 V 安裝類(lèi)型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:1136-BBGA,F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:1136-FCBGA 配用:568-5088-ND - BOARD DEMO DAC1408D750122-1796-ND - EVALUATION PLATFORM VIRTEX-5
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