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參數(shù)資料
| 型號(hào)： | X9460KV14IZ |
| 廠商： | Intersil |
| 文件頁數(shù)： | 11/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC XDCP DUAL AUD 32T 33K 14TSSOP |
| 標(biāo)準(zhǔn)包裝： | 95 |
| 系列： | XDCP™ |
| 接片： | 32 |
| 電阻（歐姆）： | 32k |
| 電路數(shù)： | 2 |
| 溫度系數(shù)： | 標(biāo)準(zhǔn)值 -300 ppm/°C |
| 存儲(chǔ)器類型： | 易失 |
| 接口： | I²C（設(shè)備位址） |
| 電源電壓： | 2.7 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 14-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 14-TSSOP |
| 包裝： | 管件 |
4
FN8203.2
October 17, 2005
Detailed Pin Description
Host Interface Pins
SERIAL CLOCK (SCL)
The SCL input clocks data into and out of the X9460.
SERIAL DATA (SDA)
SDA is a bidirectional pin used to transfer data into and out
of the device. It is an open drain output and may be wire-
ORed with any number of open drain or open collector
outputs. An open drain output requires the use of a pull-up
resistor. For selecting typical values, refer to the guidelines
for calculating typical values on the bus pull-up resistors
graph.
DEVICE ADDRESS (A1 - A0)
The Address inputs are used to set the least significant 2 bits
of the 8-bit Slave Byte Address. A match in the slave
address serial data stream must be made with the Address
input in order to initiate communication with the X9460. Up to
4 X9460s may be connected to a single I2C serial bus and
written to (NOTE: you cannot read from more than one
device on the same 2-wire bus). If left floating, these pins are
internally pulled to ground.
Slave Byte (bits, MSB-LSB) = 0101 0 A1 A0 R/W
Potentiometer Pins
RH-LEFT, RL-LEFT, RH-RIGHT, RL-RIGHT
The RH and RL inputs are equivalent to the terminal
connections on either end of a mechanical potentiometer.
RW-LEFT, RW-RIGHT
The wiper outputs are equivalent to the wiper output of a
mechanical potentiometer.
Supply Pins
ANALOG SUPPLY V- AND V+
The positive power supply for the DCP analog control
section is connected to V+. The negative power supply for
the DCP analog control section is connected to V-.
DIGITAL SUPPLIES VCC, VSS
The power supplies for the digital control sections.
Power-up and Down Recommendations
There are no restrictions on the power-up condition of VCC,
V+ and V- and the voltages applied to the potentiometer pins
provided that the VCC and V+ are more positive or equal to
the voltage at RH, RL, and RW, ie. VCC, V+ > RH, RL, RW. At
all times, the voltages on the potentiometer pins must be
less than V+ and more than V-.
The following VCC ramp rate spec is always in effect.
0.2 V/ms < VCC ramp < 50 V/ms
The VSS pin is always connected to the system common or
ground. VH, VL, VW are the voltages on the RH, RL, and RW
potentiometer pins.
X9460 Principles of Operation
The X9460 is a highly integrated microcircuit incorporating
two resistor arrays with their associated registers, counters
and the serial interface logic providing direct communication
between the host and the DCP potentiometers. This section
provides detailed description as following:
- Resistor Array Description
- Serial Interface Description
- Command Set and Register Information Description
Resistor Array Description
The X9460 is comprised of two resistor arrays. Each array
contains 31 discrete resistive segments that are connected
in series. The physical ends of each array are equivalent to
the fixed terminals of a mechanical potentiometer (RH and
size and tap positions.
At both ends of each array and between each resistor
segment is a CMOS switch connected to the wiper (RW)
output. Within each individual array only one switch may be
turned on at a time. These switches are controlled by the
Wiper Counter Register (WCR). The five bits of the WCR are
decoded to select, and enable, one of thirty-two switches.
TABLE 1. TOTAL -62dB RANGE PLUS MUTE POSITION
STEP SIZE
# OF STEPS
-1dB
11 steps
- 2dB
10 steps
- 3dB
5 steps
- 4dB
4 steps
Mute
1 step
TABLE 2. WIPER TAP POSITION vs dB
TAP POSITION, n
dB
MIN/MAX dB
for n = 20 to 31
n - 31
-11/0
for n = 10 to 19
2n-51
-31/-13
for n = 5 to 9
3n-61
-46/-34
for n = 1 to 4
4n-66
-62/-50
n = 0
-92
X9460
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