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參數(shù)資料
| 型號： | X9118TV14Z-2.7 |
| 廠商： | Intersil |
| 文件頁數(shù)： | 13/17頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC XDCP SGL 1024TAP 100K 14TSSOP |
| 標準包裝： | 95 |
| 系列： | XDCP™ |
| 接片： | 1024 |
| 電阻（歐姆）： | 100k |
| 電路數(shù)： | 1 |
| 溫度系數(shù)： | 標準值 ±300 ppm/°C |
| 存儲器類型： | 非易失 |
| 接口： | I²C（設備位址） |
| 電源電壓： | 2.7 V ~ 5.5 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 14-TSSOP（0.173"，4.40mm 寬） |
| 供應商設備封裝： | 14-TSSOP |
| 包裝： | 管件 |
5
FN8161.4
December 4, 2009
ACKNOWLEDGE POLLING
The disabling of the inputs during the internal nonvolatile write
operation can be used to take advantage of the typical 5ms
EEPROM write cycle time. Once the stop condition is issued to
indicate the end of the nonvolatile write command the X9118
initiates the internal write cycle. ACK polling, Flow 1, can be
initiated immediately. This involves issuing the start condition
followed by the device slave address. If the X9118 is still busy
with the write operation no ACK will be returned. If the X9118
has completed the write operation an ACK will be returned and
the master can then proceed with the next operation.
Flow 1. ACK Polling Sequence
INSTRUCTION AND REGISTER DESCRIPTION
Device Addressing: Identification Byte (ID and A)
Following a start condition, the master must output the
address of the slave it is accessing. The most significant four
bits of the slave address are the device type identifier. The
ID[3:0] bits is the device ID for the X9118; this is fixed as
0101[B] (refer to Table 1).
The A[1:0] bits in the ID byte are the internal slave address.
The physical device address is defined by the state of the
A1-A0 input pins. The slave address is externally specified
by the user. The X9118 compares the serial data stream with
the address input state; a successful compare of both
address bits is required for the X9118 to successfully
continue the command sequence. Only the device which
slave address matches the incoming device address sent by
the master executes the instruction. The A1-A0 inputs can
be actively driven by CMOS input signals or tied to VCC or
VSS. The R/W bit is the LSB and is used to set the device for
read or write operations.
INSTRUCTION BYTE AND REGISTER SELECTION
The next byte sent to the X9118 contains the instruction and
register pointer information. The three most significant bits
are used to provide the instruction opcode (I[2:0]). The RB
and RA bits point to one of the four registers. The format is
shown in Table 2.
Table 3 provides a complete summary of the instruction set
opcodes.
1
89
START
ACKNOWLEDGE
SCL FROM
MASTER
DATA OUTPUT
FROM TRANSMITTER
DATA OUTPUT
FROM RECEIVER
FIGURE 2. ACKNOWLEDGE RESPONSE FROM RECEIVER
NONVOLATILE WRITE
COMMAND COMPLETED
ENTERACK POLLING
ISSUE
START
ISSUE SLAVE
ADDRESS
ACK
RETURNED?
FURTHER
OPERATION?
ISSUE
INSTRUCTION
ISSUE STOP
NO
YES
PROCEED
ISSUE STOP
NO
PROCEED
X9118
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| X9119TV14 | 功能描述:IC DCP 100K 1024TP 14TSSOP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)字電位器 系列:XDCP™ 標準包裝:2,500 系列:XDCP™ 接片:256 電阻（歐姆）:100k 電路數(shù):1 溫度系數(shù):標準值 ±300 ppm/°C 存儲器類型:非易失 接口:I²C（設備位址） 電源電壓:2.7 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:14-TSSOP（0.173"，4.40mm 寬） 供應商設備封裝:14-TSSOP 包裝:帶卷 (TR) |
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