參數(shù)資料
型號: X88C64PI
英文描述: E2 Micro-Peripheral
中文描述: E2微型外設(shè)
文件頁數(shù): 3/14頁
文件大?。?/td> 71K
代理商: X88C64PI
X88C64
3
PRINCIPLES OF OPERATION
The X88C64 is a highly integrated peripheral device for
a wide variety of single-chip microcontrollers. The
X88C64 provides 8K bytes of E
2
PROM which can be
used either for Program Storage, Data Storage, or a
combination of both in systems based upon Harvard
(80XX) architectures. The X88C64 incorporates the
interface circuitry normally needed to decode the control
signals and demultiplex the Address/Data bus to pro-
vide a “Seamless” interface.
The interface inputs on the X88C64 are configured such
that it is possible to directly connect them to the proper
interface signals of the appropriate single-chip
microcontroller. In the Harvard type system, the reading
of data from the chip is controlled either by the
PSEN
or
the
RD
signal, which essentially maps the X88C64 into
both the Program and the Data Memory address map.
The X88C64 is internally organized as two independent
planes of 4K bytes of memory with the A
12
input select-
ing which of the two planes of memory are to be
accessed. While the processor is executing code out of
one plane, write operations can take place in the other
plane, allowing the processor to continue execution of
code out of the X88C64 during a byte or page write to the
device.
The X88C64 also features an advanced implementation
of the Software Data Protection scheme, called Block
Protect, which allows the device to be broken into 8
independent sections of 1K bytes. Each of these sec-
tions can be independently enabled for write operations;
thereby allowing certain sections of the device to be
secured so that updates can only occur in a controlled
environment (e.g. in an automotive application, only at
an authorized service center). The desired set-up con-
figuration is stored in a nonvolatile register, ensuring the
configuration data will be maintained after the device is
powered down.
The X88C64 also features a Write Control input (
WC
),
which serves as an external control over the completion
of a previously initiated page load cycle.
The X88C64 also features the industry standard
E
2
PROM characteristics such as byte or page mode
write and Toggle Bit Polling.
DEVICE OPERATION
MODES
Mixed Program/Data Memory
By properly assigning the address spaces, a single
X88C64 can be used as both the Program and Data
Memory. This would be accomplished by connecting all
of the 8051 control outputs to the corresponding inputs
of the X88C64.
In this configuration, one plane of memory could be
dedicated to Program Storage and the other plane
dedicated to Data Storage. The Data Storage can be
fully protected by enabling block protect write lockout.
Program Memory Mode
This mode of operation is read-only. The
PSEN
and
ALE
inputs of the X88C64 are tied directly to the
PSEN
and
ALE outputs of the microcontroller. The
RD
and
WR
inputs are tied HIGH.
When ALE is HIGH, the A/D
0
–A/D
7
and A
8
–A
12
ad-
dresses flow into the device. The addresses, both low
and high order, are latched when ALE transitions LOW
(V
IL
).
PSEN
will then go LOW and after t
PLDV
, valid data
is presented on the A/D
0
–A/D
7
pins.
CE
must be LOW
during the entire operation.
3867 FHD F03
TYPICAL APPLICATION
P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7
P2.0
P2.1
P2.2
P2.3
P2.4
PSEN
ALE
RD
WR
P2.7
39
38
37
36
35
34
33
32
21
22
23
24
25
29
30
17
16
7
8
9
10
11
13
14
15
21
20
17
19
2
5
6
22
18
23
16
A/D0
A/D1
A/D2
A/D3
A/D4
A/D5
A/D6
A/D7
A8
A9
A10
A11
A12
WC
PSEN
ALE
RD
WR
CE
VCC
24
X1
X2
EA/VP
31
19
18
X88C64
80C31
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相關(guān)代理商/技術(shù)參數(shù)
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X88C64SM 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:E2 Micro-Peripheral