![](http://datasheet.mmic.net.cn/280000/X40626S14I-4-5A_datasheet_16104385/X40626S14I-4-5A_1.png)
REV 1.1.15 2/11/04
Characteristics subject to change without notice.
1 of 23
www.xicor.com
64K
X40626
8K x 8 Bit
Dual Voltage CPU Supervisor with 64K Serial EEPROM
FEATURES
Dual voltage monitoring
—V
2Mon
operates independent of V
Watchdog timer with selectable timeout intervals
Low V
CC
detection and reset assertion
—Four standard reset threshold voltages
—User programmable V
—Reset signal valid to V
Low power CMOS
—20μA max standby current, watchdog on
—1μA standby current, watchdog OFF
64Kbits of EEPROM
—64 byte page size
Built-in inadvertent write protection
—Power-up/power-down protection circuitry
—Protect 0, 1/4, 1/2, all or 64, 128, 256 or 512
bytes of EEPROM array with programmable
Block Lock
protection
400kHz 2-wire interface
—Slave addressing supports up to 4 devices on
the same bus
2.7V to 5.5V power supply operation
Available Packages
—14-lead SOIC
—14-lead TSSOP
CC
TRIP
CC
threshold
=1V
DESCRIPTION
The X40626 combines four popular functions, Power-on
Reset Control, Watchdog Timer, Dual Supply Voltage
Supervision, and Serial EEPROM Memory in one pack-
age. This combination lowers system cost, reduces
board space requirements, and increases reliability.
Applying power to the device activates the power on
reset circuit which holds RESET active for a period of
time. This allows the power supply and oscillator to stabi-
lize before the processor can execute code.
The Watchdog Timer provides an independent protection
mechanism for microcontrollers. When the microcontrol-
ler fails to restart a timer within a selectable time-out
interval, the device activates the RESET signal. The user
selects the interval from three preset values. Once
selected, the interval does not change, even after cycling
the power.
The device’s low V
user’s system from low voltage conditions, resetting the
system when V
CC
falls below the set minimum V
point. RESET is asserted until V
CC
detection circuitry protects the
CC
trip
CC
returns to proper
BLOCK DIAGRAM
Watchdog
Timer Reset
Data
Register
Command
Decode &
Control
Logic
SDA
SCL
V
CC
Reset &
Watchdog
Timebase
Power on and
Low Voltage
Generation
V
TRIP
+
-
RESET
Reset
Status
Register
Protect Logic
64KB
EEPROM
Array
Watchdog Transition
Detector
WP
V
CC
Threshold
Reset logic
B
S0
S1
V2 Monitor
Logic
+
V
TRIP2
-
V2MON
V2FAIL
Preliminary Information