參數(shù)資料
型號(hào): X40010
英文描述: Dual Voltage Monitor with Integrated CPU Supervisor
中文描述: 雙電壓監(jiān)視器集成CPU監(jiān)控
文件頁(yè)數(shù): 3/25頁(yè)
文件大?。?/td> 124K
代理商: X40010
X40010/X40011/X40014/X40015 – Preliminary
Characteristics subject to change without notice.
3 of 25
REV 1.3.4 7/12/02
www.xicor.com
PRINCIPLES OF OPERATION
Power On Reset
Application of power to the X40010/11/14/15 activates a
Power On Reset Circuit that pulls the RESET/RESET
pins active. This signal provides several benefits.
– It prevents the system microprocessor from starting to
operate with insufficient voltage.
– It prevents the processor from operating prior to stabili-
zation of the oscillator.
– It allows time for an FPGA to download its configuration
prior to initialization of the circuit.
– It prevents communication to the EEPROM, greatly
reducing the likelihood of data corruption on power up.
When V
CC
exceeds the device V
t
PURST
(selectable) the circuit releases the RESET
(X40011) and RESET (X40010) pin allowing the system
to begin operation.
TRIP1
threshold value for
Low Voltage V
During operation, the X40010/11/14/15 monitors the V
level and asserts RESET/RESET if supply voltage falls
below a preset minimum V
signal prevents the microprocessor from operating in a
power fail or brownout condition. The V1FAIL signal
remains active until the voltage drops below 1V. It also
remains active until V
CC
returns and exceeds V
t
PURST
.
CC
(V1 Monitoring)
CC
TRIP1
. The RESET/RESET
TRIP1
for
Low Voltage V2 Monitoring
The X40010/11/14/15 also monitors a second voltage
level and asserts V2FAIL if the voltage falls below a
preset minimum V
TRIP2
. The V2FAIL signal is either
ORed with RESET to prevent the microprocessor from
operating in a power fail or brownout condition or used to
interrupt the microprocessor with notification of an
impending power failure. For the X40010/11 the V2FAIL
signal remains active until the V
falling). It also remains active until V2MON returns and
exceeds V
TRIP2
by 0.2V. This voltage sense circuitry
monitors the power supply connected to the V2MON pin.
If V
CC
= 0, V2MON can still be monitored.
CC
drops below 1V (V
CC
For the X40014/15 devices, the V2FAIL signal remains
actice until V
CC
drops below 1Vx and remains active until
V2MON returns and exceeds V
is powered by V
CC
. If V
CC
= 0, V2MON cannot be moni-
tored.
TRIP2
. This sense circuitry
Figure 1. Two Uses of Multiple Voltage Monitoring
6–10V
V
CC
5V
Reg
V2MON
(2.9V)
X40011-A
Resistors selected so 3V appears on V2MON when unregulated
supply reaches 6V.
Unreg.
Supply
V
CC
X40014-C
RESET
V2FAIL
System
Reset
V
CC
RESET
V2FAIL
V
CC
System
Reset
Notice:
No external components required to monitor two voltages.
1M
1M
V2MON
3.3V
Reg
1.2V
Reg
V2MON
5
7
SDA
Serial Data.
open drain output and may be wire ORed with other open drain or open collector outputs. This pin
requires a pull up resistor and the input buffer is always active (not gated).
Watchdog Input.
A HIGH to LOW transition on the SDA (while SCL is toggled from HIGH to
LOW and followed by a stop condition) restarts the Watchdog timer. The absence of this tran-
sition within the watchdog time out period results in WDO going active.
Serial Clock.
The Serial Clock controls the serial bus timing for data input and output.
WDO Output.
WDO is an active LOW, open drain output which goes active whenever the
watchdog timer goes active.
Supply Voltage
SDA is a bidirectional pin used to transfer data into and out of the device. It has an
6
7
8
1
SCL
WDO
8
2
V
CC
PIN DESCRIPTION
(Continued)
Pin
Name
Function
SOIC TSSOP
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