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參數(shù)資料
| 型號： | WPS256K16T-25LJIGA |
| 廠商： | MICROSEMI CORP-PMG MICROELECTRONICS |
| 元件分類： | SRAM |
| 英文描述： | 256K X 16 STANDARD SRAM, 25 ns, PDSO44 |
| 封裝： | ROHS COMPLIANT, PLASTIC, SOJ-44 |
| 文件頁數(shù)： | 5/8頁 |
| 文件大?。?/td> | 602K |
| 代理商： | WPS256K16T-25LJIGA |
5
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
White Electronic Designs
EDI816256CA-XM44XG
WPS256K16X-XLJXG
March 2009
Rev. 1
White Electronic Designs Corp. reserves the right to change products or specications without notice.
ADDRESS
DATA I/O
READ CYCLE 1 (CS# = OE# = VIL, UB# or LB# = VIL, WE# = VIH)
tAA
tOH
tRC
DATA VALID
PREVIOUS DATA VALID
ADDRESS
DATA I/O
CS#
LB#, UB#
OE#
tRC
tAA
tACS
tCLZ
tBLZ
tBA
tCHZ
tBHZ
tOE
tOLZ
tOHZ
HIGH IMPEDANCE
DATA VALID
READ CYCLE 2 (WE# = VIH)
ADDRESS
DATA I/O
WRITE CYCLE 1, WE# CONTROLLED
tAW
tCW
tAH
tWP
tDW
tWHZ
tAS
tOW
tDH
tWC
DATA VALID
CS#
WE#
LB#, UB#
tBW
ADDRESS
DATA I/O
WRITE CYCLE 3, CS# CONTROLLED
tAW
tAS
tCW
tAH
tBW
tWP
tDH
tDW
tWC
CS#
LB#, UB#
WE#
DATA VALID
TIMING WAVEFORM - READ CYCLE
WRITE CYCLE - WE# CONTROLLED
WRITE CYCLE - CS# CONTROLLED
ADDRESS
DATA I/O
WRITE CYCLE 2, CS# CONTROLLED
tAW
tAS
tCW
tAH
tWP
tDH
tDW
tWC
CS#
WE#
DATA VALID
tBW
LB#, UB#
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