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參數資料
| 型號： | W3EG72129S335JD3SG |
| 廠商： | WHITE ELECTRONIC DESIGNS CORP |
| 元件分類： | DRAM |
| 英文描述： | 128M X 72 DDR DRAM MODULE, 0.7 ns, DMA184 |
| 封裝： | ROHS COMPLIANT, DIMM-184 |
| 文件頁數： | 1/12頁 |
| 文件大?。?/td> | 171K |
| 代理商： | W3EG72129S335JD3SG |
1
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
White Electronic Designs
PRELIMINARY*
October 2005
Rev. 3
W3EG72129S-JD3
1GB – 2x64Mx72 DDR SDRAM REGISTERED w/PLL
DESCRIPTION
The W3EG72129S is a 2x64Mx72 Double Data Rate
SDRAM memory module based on 512Mb DDR SDRAM
component. The module consists of eighteen 64Mx8 DDR
SDRAMs in 66 pin TSOP package mounted on a 184 Pin
FR4 substrate.
Synchronous design allows precise cycle control with the
use of system clock. Data I/O transactions are possible on
both edges and Burst Lenths allow the same device to be
useful for a variety of high bandwidth, high performance
memory system applications.
* This product is under development, is not qualied or characterized and is subject to
change without notice.
FEATURES
Double-data-rate architecture
Clock speeds of 100MHz, 133MHz, 166MHz and
200MHz
Bi-directional data strobes (DQS)
Differential clock inputs (CK & CK#)
Programmable Read Latency 2,2,5 (clock)
Programmable Burst Length (2,4,8)
Programmable Burst type (sequential & interleave)
Edge aligned data output, center aligned data input
Auto and self refresh
Serial presence detect
Dual Rank
Power Supply:
VCC = VCCQ = +2.5V (100, 133 and 166MHz)
VCC = VCCQ = +2.6V (200MHz)
JEDEC standard 184 pin DIMM package
PCB height:
JD3: 30.48mm (1.20")
NOTE: Consult factory for availability of:
RoHS compliant products
Vendor source control options
Industrial temperature option
OPERATING FREQUENCIES
DDR400 @CL=3
DDR333 @CL=2.5
DDR266 @CL=2
DDR266 @CL=2.5
DDR200 @CL=2
Clock Speed
200MHz
166MHz
133MHz
100MHz
CL-tRCD-tRP
3-3-3
2.5-3-3
2-2-2
2-3-3
2.5-3-3
2-2-2
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