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參數(shù)資料
| 型號： | W24256A |
| 廠商： | WINBOND ELECTRONICS CORP |
| 英文描述： | 32K×8bit High-Speed CMOS Static RAM(32K×8位高速CMOS靜態(tài)RAM) |
| 中文描述： | 32K的× 8位高速CMOS靜態(tài)RAM（32K的× 8位高速的CMOS靜態(tài)RAM）的 |
| 文件頁數(shù)： | 6/10頁 |
| 文件大?。?/td> | 152K |
| 代理商： | W24256A |
Preliminary W24256A
- 6 -
Timing Waveforms, continued
Write Cycle 1
(
OE
Clock)
Address
OE
CS
WE
D
OUT
D
IN
T
WC
T
WR
T
CW
T
WP
T
AS
T
OHZ
(1, 4)
T
DW
T
DH
T
AW
Write Cycle 2
(OE = V
IL
Fixed)
Address
CS
WE
D
OUT
IN
T
WC
CW
T
AS
DH
T
WR
WP
T
WHZ
DW
(2)
(3)
OW
T
OH
AW
(1, 4)
Notes:
1. During this period, I/O pins are in the output state, so input signals of opposite phase to the outputs should not be applied.
2. The data output from D
OUT
are the same as the data written to D
IN
during the write cycle.
3. D
OUT
provides the read data for the next address.
4. Transition is measured
±
500 mV from steady state with C
L
= 5 pF. This parameter is guaranteed but not 100% tested.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| W24256 | 32K X 8 CMOS STATIC RAM |
| W24256-70L | 32K X 8 CMOS STATIC RAM |
| W24256-70LL | CABLE ASSEMBLY; LEAD-FREE SOLDER; F MALE TO F MALE; 75 OHM, RG11/U COAX |
| W24256Q-70L | BOX 3.05X1.51X1.05 W/2 BTNS GRY |
| W24256Q-70LL | 32K X 8 CMOS STATIC RAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| W24256AJ-20 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 SRAM |
| W24256AJ-20L | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 SRAM |
| W24256AJ-25 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 SRAM |
| W24256AJ-25L | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 SRAM |
| W24256AJ-35 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 SRAM |
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