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VT8371
Preliminary Revision 1.02
, January 7, 2000
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Revision History
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R
EVISION
H
ISTORY
Document Release
0.1
0.2
Date
4/12/99
6/14/99
Revision
Initial internal release
Updated feature bullets, overview and pin descriptions
Added ballout per engineering document revision 0.2
Added registers from 694X data sheet rev 0.61 (bank ending addresses fixed)
Updated package mechanical to 510 BGA
Fixed formatting problems on electrical specs page
Updated feature bullets, overview, and block diagram
Updated pinouts (changed CPU interface and some DRAM data & AGP pins)
Updated package mechanical to BGA512
Updated register specs to reflect K7 register set (rev 0.2 was a copy of 694X)
Fixed pinout errors in center VCC/GND and changed AGP & MD areas
Fixed strap options
Fixed device 0 registers Rx58-59, 61-63, 69, 7B, AC, AE, B4
Updated mechanical specs to 516 BGA
Fixed typographical error in feature bullets regarding package pin count
Fixed formatting errors in page footer revision numbers and document date
Updated pinouts per engineering ballout rev 0.6: swapped PWROK & WSC#
Updated pinouts per engineering ballout rev 0.7: swapped D37# and VTT
Changed Device 0 and Device 1 Rx2 Device ID values
Fixed Device 0 Rx10[27-20] typographical error, Rx88[2] bit function, and
RxA0 and RxA4 default values (typographical errors)
Fixed Device 0 Rx54[0] bit definition and Device 1 Rx2 Device ID
Added Device 0 RxC0-C7 Power Management registers
Fixed GCKRUN# pin direction
Added strap to register cross references to MAA/MAB pin descriptions
Device 0
Fixed Rx3-2 (Device ID), 52[3], 68[0], 76[3-0], 7B[1], F0-F7
Fixed RxB4[3-2] strapping & RxB5[7,3] polarity; added RxB4-5 defaults
Device 1
Fixed Rx3-2 (Device ID), 1F-1E, Rx40[3], 42[4, 0], 44[4-1], 82[5], 83[2-1]
Changed “K7” to Athlon” and reworded document title
Changed feature bullets in DRAM controller section
Removed “NDA Required” disclaimer (product announced)
Fixed minor typo in pinout table (pin lists and descriptions were correct)
Added Device 0 Rx55[1], moved Device 0 registers RxB4-B6 to B3-B5
Removed “Socket-462” from description (chip is optimized for Slot-A)
Updated VIA Logo to “Delivering Value” format
Fixed typos in DRAM controller feature bullets and Device 0 RxB2[0]
Initials
DH
EC
DH
0.21
0.3
6/17/99
7/2/99
DH
DH
0.41
7/13/99
DH
0.5
7/20/99
DH
0.51
7/22/99
DH
0.6
8/26/99
DH
1.0
11/1/99
DH
1.01
1/7/00
DH
1.02
1/17/00
DH