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參數(shù)資料
| 型號： | VSC8131 |
| 廠商： | VITESSE SEMICONDUCTOR CORP |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | 2.488 Gbit/sec 32:1 SONET/SDH Mux with Clock Generator |
| 中文描述： | MUX/DEMUX, PQFP128 |
| 封裝： | 14 X 20 MM, 2 MM HEIGHT, HEAT SINK, PLASTIC, QFP-128 |
| 文件頁數(shù)： | 6/16頁 |
| 文件大?。?/td> | 155K |
| 代理商： | VSC8131 |
VITESSE
Preliminary Datasheet
VSC8131
2.488 Gbit/sec
32:1 SONET/SDH Mux with Clock Generator
Page 6
VITESSE
SEMICONDUCTOR CORPORATION
741 Calle Plano, Camarillo, CA 93012 805/388-3700 FAX: 805/987-5896
11/9/99
G52249-0, Rev. 3.0
AC Characteristics
Table 1: VSC8131 Multiplexer AC Characteristics
(Over recommended operating conditions)
Figure 4: VSC8131 Multiplexer Waveforms
Parameter
Description
Min
Typ
Max
Units
t
DRCLK
t
DCLK32
t
DC32
t
DCLOL
t
DSU
t
DH
t
PEO
t
CKPROP
REFCLK period
CK78IN period
CK78OUT (CLK/32) duty cycle
LOL Duty Cycle (When CMU is not locked)
D(0-31) and PARBIT set-up time (wrt CK78IN rising edge)
D(0-31) and PARBIT hold time (wrt CK78IN rising edge)
Parity error output timing; rising edge of CK78IN to PARERR
Allowable propagation delay for connecting CK78OUT to CK78IN
High speed clock output (CO
+
) timing; falling edge of CO+ to
muxed data output (DO
+
)
REFCLK rise and fall times (10%-90%)
D(0.31) rise and fall times (10%-90%)
CK78OUT, LOL and PARERR rise and fall times (10%-90%)
DO
+
rise and fall times (20%-80%)
CO
+
rise and fall times (20%-80%)
12.8
12.8
-
-
-
-
-
-
ns
ns
%
%
ns
ns
ns
ns
40
40
1.0
1.0
1.9
0
60
60
-
-
6.0
3.0
t
CMD
100
270
ps
t
r
, t
f
t
r
, t
f
t
r
, t
f
t
r
, t
f
t
r
,
t
f
-
-
-
-
-
-
-
-
1.5
2.0
4.0
170
170
ns
ns
ns
ps
ps
150
150
VALID DATA (1)
VALID DATA (2)
D0 D1 D2 D3 D4
D277D28 D29 D30 D31
Parallel data clock input
Parity and parallel data inputs
Reference clock input
High speed differential serial data output
CK78IN
PARBIT D(0...31)
REFCLK
DO+
Serialized Data
t
DCLK32
t
DRCLK
t
DCLK32
t
DH
t
DSU
NOTE:
=
Don’t care
...... ... ... ... ...
High speed differential clock output
CO+
t
CMD
Parity error output
PARERR
t
PEO
t
PEO
Parallel data clock output
CK78OUT
t
CKPROP
t
DC32
t
DC32
D0 IS MSB AND TRANSMITTED FIRST
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|---|---|
| VSC8132 | 2.488Gb/s 1:32 SONET/SDH Demux |
| VSC8132QR | 2.488Gb/s 1:32 SONET/SDH Demux |
| VSC8140 | 2.48832Gb/s 16:1 SONET/SDH Transceiver with Integrated Clock Generator |
| VSC8140QR | 2.48832Gb/s 16:1 SONET/SDH Transceiver with Integrated Clock Generator |
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| VSC8132 | 制造商:VITESSE 制造商全稱:Vitesse Semiconductor Corporation 功能描述:2.488Gb/s 1:32 SONET/SDH Demux |
| VSC8132QR | 制造商:VITESSE 制造商全稱:Vitesse Semiconductor Corporation 功能描述:2.488Gb/s 1:32 SONET/SDH Demux |
| VSC8140 | 制造商:VITESSE 制造商全稱:Vitesse Semiconductor Corporation 功能描述:2.48832Gb/s 16:1 SONET/SDH Transceiver with Integrated Clock Generator |
| VSC8140QR | 制造商:VITESSE 制造商全稱:Vitesse Semiconductor Corporation 功能描述:2.48832Gb/s 16:1 SONET/SDH Transceiver with Integrated Clock Generator |
| VSC8140TW | 制造商:VITESSE 制造商全稱:Vitesse Semiconductor Corporation 功能描述:2.48832Gb/s 16:1 SONET/SDH Transceiver with Integrated Clock Generator |
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