參數(shù)資料
型號: VSC7124QM
廠商: VITESSE SEMICONDUCTOR CORP
元件分類: 通信及網(wǎng)絡(luò)
英文描述: Quad Port Bypass Circuit
中文描述: SPECIALTY TELECOM CIRCUIT, PQFP44
封裝: 10 X 10 MM, 2 MM HEIGHT, 0.80 MM PITCH, PLASTIC, MS-022, QFP-44
文件頁數(shù): 3/8頁
文件大小: 128K
代理商: VSC7124QM
VITESSE
G52293-0, Rev 2.3
05/07/01
Page 3
VITESSE
SEMICONDUCTOR CORPORATION
741 Calle Plano
Camarillo, CA 93012
Tel: (800) VITESSE
FAX: (805) 987-5896
Email: prodinfo@vitesse.com
Internet: www.vitesse.com
Advance Product Information
VSC7124
Quad Port Bypass Circuit
Figure 2: Timing Waveforms
AC Characteristics
(Over Recommended Operating Conditions)
DC Characteristics
(Over Recommended Operating Conditions)
NOTE: (1) Refer to Application Note AN-37 for details regarding differential voltage measurements.
Parameters
Description
Min
Typ
Max
Units
Conditions
T
1
Propagation Delay
7.0
ns
Delay with all circuits
bypassed.
At
V
IN
minimum levels
Peak-to-Peak on Ox+/-
T
R
, T
F
T
j(PBC)
Serial Data Rise and Fall Time
Data Jitter Accummulation
300
120
ps
ps
Parameters
Description
Min
Typ
Max
Units
Conditions
V
OH
V
OL
V
IH
V
IL
I
IH
I
IL
Output HIGH voltage (TTL)
Output LOW voltage (TTL)
Input HIGH voltage (TTL)
Input LOW voltage (TTL)
Input HIGH current (TTL)
Input LOW current (TTL)
TX output differential peak-to-peak
voltage swing
TX output differential peak-to-peak
voltage swing
Receiver differential peak-to-peak
Input Sensitivity RX
Supply voltage
2.4
V
V
V
V
μ
A
μ
A
I
OH
= -1.0 mA
I
OL
= +1.0 mA
0.5
5.5
0.8
500
-500
2.0
0
50
V
IN
=2.4V
V
IN
=0.5V
V
OUT75(1)
1200
2200
mVp-p
75
to V
DD
2.0 V
V
OUT50(1)
1000
2200
mVp-p
50
to V
DD
2.0 V
V
IN(1)
400
2600
mVp-p
Internally biased to V
DD
/2
V
DD
3.14
3.47
V
3.3V±5%
Outputs open,
V
DD
= V
DD
max ±2%
Outputs open,
V
DD
= V
DD
max
P
D
Power dissipation
250
555
mW
I
DD
Power Supply Current
76
160
mA
T
1
T
1
Ox+/-
Ix+/-
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