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參數(shù)資料
| 型號： | VSC6424 |
| 廠商： | VITESSE SEMICONDUCTOR CORP |
| 元件分類： | 數(shù)字信號處理外設 |
| 英文描述： | 500 Mb/s Video Shift Register IC |
| 中文描述： | 10-BIT, DSP-VIDEO SHIFT REGISTER, PQFP128 |
| 封裝： | 14 X 20 MM, 2.70 MM HEIGHT, HEAT SINK, PLASTIC, QFP-128 |
| 文件頁數(shù)： | 1/18頁 |
| 文件大?。?/td> | 364K |
| 代理商： | VSC6424 |
VITESSE
Preliminary Datasheet
VSC6424
500 Mb/s Video
Shift Register IC
G52236-0, Rev 3.0
7/13/99
VITESSE
SEMICONDUCTOR CORPORATION
741 Calle Plano, Camarillo, CA 93012 805/388-3700 FAX: 805/987-5896
Page 1
Features
Multiplex or Demultiplex Operation
General Description
The VSC6424 is a 500Mb/s video shift register IC that is based on a 40-bit user-configured shift register.
The shift register may be used either as a multiplexer (parallel in, serial out) or as a demultiplexer (serial in, par-
allel out). The VSC6424 can be configured into 8 5-bit, 8 4-bit, 5 8-bit, 4 10-bit, 2 16-bit, 2 20-bit, 1 32-bit, or 1
40-bit shift register.
VSC6424 Functional Block Diagram
Selectable Shift Register Length
500Mb/s Operation using internal timing
250Mb/s Operation using external timing
Functional Replacement for Bt424
External ECL Reference Voltage (-1.32 V)
ECL and TTL I/Os: ECL for high-speed interface,
TTL for low-speed interface
Power Supplies: +3.3V and -2V @ 2.7 Watts (Max.)
Commercial (0
o
to +70
o
C) Temperature Range
Package: 14mm x 20mm 128 PQFP
40-bit
Register
INT/EXTN
MODE
Clock
Generator
40
CLKE
(ECL)
CLKT
(TTL)
S<0:2>
High
Speed
Interface
(ECL)
SP<0:2>
A<0:4>
SLDN/SYNC
SB<0:39>
40
10
40
OPS
CLK
Phase
Rotation
HBLANK
VBLANK
SENLLDN
AEN/RETIME
(ECL)
OEN
DE-
MUX
MUX
(TTL)
T
Input
Latch
(
3
5
3
8
10
DIN<0:9>
CLKOUT
DOUT<0:7>
Low
Speed
Interface
(TTL)
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