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參數(shù)資料
| 型號： | VP1550 |
| 廠商： | Supertex, Inc. |
| 英文描述： | P-Channel Enhancement-Mode Vertical DMOS FETs |
| 中文描述： | P通道增強(qiáng)模式垂直的DMOS場效應(yīng)管 |
| 文件頁數(shù)： | 2/2頁 |
| 文件大?。?/td> | 431K |
| 代理商： | VP1550 |
2
90%
10%
90%
90%
10%
10%
PULSE
GENERATOR
V
DD
R
L
OUTPUT
D.U.T.
t
(ON)
t
d(ON)
t
(OFF)
t
d(OFF)
t
F
t
r
INPUT
INPUT
OUTPUT
0V
V
DD
R
gen
0V
-10V
VP1550
Switching Waveforms and Test Circuit
Electrical Characteristics
(@ 25
°
C unless otherwise specified)
Symbol
Parameter
Min
Typ
Max
Unit
Conditions
BV
DSS
-500
V
GS(th)
V
GS(th)
I
GSS
I
DSS
Gate Threshold Voltage
-2.0
-4.5
V
V
GS
= V
DS
, I
D
= -1mA
V
GS
= V
DS
, I
D
= -1mA
V
GS
=
±
20V, V
DS
= 0V
V
GS
= 0V, V
DS
= Max Rating
V
GS
= 0V, V
DS
= 0.8 Max Rating
T
A
= 125
°
C
V
GS
= -5V, V
DS
= -25V
V
GS
= -10V, V
DS
= -25V
V
GS
= -5V, I
D
= -5mA
V
GS
= -10V, I
D
= -10mA
V
GS
= -10V, I
D
= -10mA
V
DS
= -25V, I
D
= -10mA
Change in V
GS(th)
with Temperature
Gate Body Leakage
3.5
6
mV/
°
C
-100
nA
Zero Gate Voltage Drain Current
-10
μ
A
I
D(ON)
ON-State Drain Current
-90
-100
-240
R
DS(ON)
85
80
125
R
DS(ON)
G
FS
C
ISS
C
OSS
C
RSS
t
d(ON)
t
r
t
d(OFF)
t
f
V
SD
t
rr
Change in R
DS(ON)
with Temperature
Forward Transconductance
0.85
%/
°
C
25
40
m
Input Capacitance
40
70
Common Source Output Capacitance
10
20
pF
Reverse Transfer Capacitance
3
10
Turn-ON Delay Time
5
10
Rise Time
8
10
Turn-OFF Delay Time
8
15
Fall Time
5
16
Diode Forward Voltage Drop
-0.8
-1.5
V
V
GS
= 0V, I
SD
= -0.1A
V
GS
= 0V, I
SD
= -0.1A
Reverse Recovery Time
200
ns
Notes:
1. All D.C. parameters 100% tested at 25
°
C unless otherwise stated. (Pulse test: 300
μ
s pulse, 2% duty cycle.)
2. All A.C. parameters sample tested.
mA
V
V
GS
= 0V, I
D
= -1mA
Drain-to-Source
Breakdown Voltage
Static Drain-to-Source
ON-State Resistance
-1000
V
DD
= -25V
I
D
= -100mA
R
GEN
= 25
ns
V
GS
= 0V, V
DS
= -25V
f = 1 MHz
1235 Bordeaux Drive, Sunnyvale, CA 94089
TEL: (408) 744-0100 FAX: (408) 222-4895
www.supertex.com
11/12/01
2001 Supertex Inc. All rights reserved. Unauthorized use or reproduction prohibited.
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