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參數(shù)資料
| 型號(hào)： | VCC1-A3C-50M0000000 |
| 廠商： | VECTRON INTERNATIONAL |
| 元件分類： | XO, clock |
| 英文描述： | CRYSTAL OSCILLATOR, CLOCK, 50 MHz, CMOS OUTPUT |
| 封裝： | ROHS COMPLIANT, HERMETIC SEALED PACKAGE-4 |
| 文件頁(yè)數(shù)： | 4/10頁(yè) |
| 文件大?。?/td> | 257K |
| 代理商： | VCC1-A3C-50M0000000 |
Vectron International 267 Lowell Road, Hudson, NH 03051 Tel: 1-88-VECTRON-1 http://www.vectron.com
Page3
Performance Specifications
Table 2. Electrical Performance, 3.3V Option
Parameter
Symbol
Mininum
Typical
Maximum
Units
Supply
Voltage1
V
DD
2.97
3.3
3.63
V
Maximum Voltage
-0.5
5
V
Current2
≤20.000
20.001 to 50.000
50.001 to 85.000
85.001 to 190.000
I
DD
7
20
30
50
mA
Current, Output Disabled
30
uA
Frequency
Nominal Frequency3
f
N
1.544
190.000
MHz
Stability4, (Ordering Option)
±20, ±25, ±32, ±50, ±100
ppm
Outputs
Output Logic Levels2
Output Logic High
Output Logic Low
Output Logic High Drive
Output Logic Low Drive
V
OH
V
OL
I
OH
I
OL
0.9*V
DD
8
0.1*V
DD
V
mA
Load
I
OUT
15
pF
Output Rise /Fall Time2
<20.000MHz
20.000 to 50.000MHz
50.001 to 90.000MHz
90.001 to 190.000MHz
t
R
/t
F
6
4
3
2
ns
Output Leakage, Output Disabled2,5
I
Z
±10
uA
Duty Cycle2,5
45
50
55
%
Period Jitter6
RMS
Peak-Peak
фJ
2.5
18
ps
RMS Jitter, 12k-20M
фJ
0.5
1
ps
Enable/Disable
Output Enable/Disable7
Output Enable
Output Disable
V
IH
V
IL
2.0
0.5
V
Disable time
t
D
100
ns
Enable Internal Pull-Up Resistor
100
Kohm
Start-Up Time
t
SU
10
ms
Operating Temp, (Ordering Option)
T
OP
-10/70, -40/85, -55/125
°C
The power supply should have by-pass capacitors as close to the supply and to ground as possible, for example 0.1 and 0.01uF
1]
Parameters are tested with the test circuit shown in Figure 1.
2]
See Standard Frequencies and Ordering Information tables for more specific information
3]
Includes initial accuracy, operating temperature, supply voltage, shock and vibration (not under operation) and 10 years aging.
4]
Duty Cycle is measured as On Time/Period, see Fig 2.
5]
Broadband Period Jitter measured using a LeCroy Wavemaster 8600A, 90K samples, see Application Note for Typical Phase Noise and Jitter Performance
6]
The Output is Enabled if the Enable/Disable is left open.
7]
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