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SBOS275C JUNE 2003 REVISED OCTOBER 2004
www.ti.com
20
OUTPUT OFFSET ERROR
Several elements contribute to the output offset voltage
error; among them are the input offset voltage, the output
offset voltage, the input bias current and the input offset
current. To simplify the following analysis, the output offset
voltage error is dependent only on the output-offset
voltage of the VCA810 and the input offset voltage. The
output offset error can then be expressed as Equation (7):
V
OS
V
OSO
10
G
dB
20
V
IOS
with:
V
OS
: Output Offset Error
V
OSO
: Output Offset Voltage
G
dB
: VCA810 Gain in dB
V
IOS
: Input Offset Voltage
This is shown in Figure 17.
50
40
30
20
10
0
10
20
30
40
50
Gain (dB)
O
40
30
20
10
0
10
20
30
40
Maximum Error Band
Typical Devices
Figure 17. Output Offset Error vs. Gain
The histogram
Output Offset Voltage at Maximum Gain
in
the Typical Characteristics curves shows the distribution
for the output offset voltage at maximum gain.
OFFSET ADJUSTMENT
Where desired, the offset of the VCA810 can be removed
as shown in Figure 18. This circuit simply presents a DC
voltage to one of the amplifier inputs to counteract the
offset error voltage. For best offset performance, the trim
adjustment should be made with the amplifier set at the
maximum gain of the intended application. The offset
voltage of the VCA810 varies with gain as shown in
Figure 17, limiting the complete offset cancellation to one
selected gain. Selecting the maximum gain optimizes
offset performance for higher gains where high
amplification of the offset effects produces the greatest
output offset. Two features minimize the offset control
circuit noise contribution to the amplifier input circuit. First,
making the resistance of R
2
a low value minimizes the
noise directly introduced by the control circuit. This
approach reduces both the thermal noise of the resistor
and the noise produced by the resistor with the amplifier
input noise current. A second noise reduction results from
capacitive bypass of the potentiometer output. This
reduction filters out power-supply noise that would
otherwise couple to the amplifier input.
This filtering action diminishes as the wiper position
approaches either end of the potentiometer, but practical
conditions prevent such settings. Over its full adjustment
range, the offset control circuit produces a
±
5mV input
offset correction for the values shown. However, the
VCA810 only requires one tenth of this range for offset
correction, assuring that the potentiometer wiper will
always be near the potentiometer center. With this setting,
the resistance seen at the wiper remains high, which
stabilizes the filtering function.
VCA810
1
μ
F
V
C
V
V
IN
V
O
R
V
100k
R
2
10
V+
R
1
10k
Figure 18. Optional Offset Adjustment
GAIN CONTROL
The VCA810 gain is controlled by means of a unipolar
negative voltage applied between ground and the gain
control input, pin 3. If use of the output disable feature is
required, a ground-referenced bipolar voltage is needed.
Output disable occurs for +0.15V
≤
V
C
≤
+2V, and
produces > 80dB of attenuation. The control voltage
should be limited to +2V in disable mode, and –2.5V in gain
mode in order to prevent saturation of internal circuitry.
The VCA810 gain-control input has a –3dB bandwidth of
25MHz and varies with frequency, as shown in the Typical
Characteristic curves. This wide bandwidth, although
useful for many applications, can allow high-frequency
noise to modulate the gain control input. In practice, this
can be easily avoided by filtering the control input, as
(7)