參數(shù)資料
型號(hào): VC16241ADGG
廠商: NXP SEMICONDUCTORS
元件分類: 通用總線功能
英文描述: 16-bit buffer/line driver 3-State
中文描述: LVC/LCX/Z SERIES, QUAD 4-BIT DRIVER, TRUE OUTPUT, PDSO48
封裝: 6.10 MM, PLASTIC, SOT-362-1, TSSOP2-48
文件頁數(shù): 6/10頁
文件大?。?/td> 78K
代理商: VC16241ADGG
Philips Semiconductors
Product specification
74LVC16241A
16-bit buffer/line driver (3-State)
1997 Jul 29
6
AC WAVEFORMS
V
M
= 1.5V at V
V
OL
and V
are the typical output voltage drop that occur with the output load.
V
X
= V
OL
+ 0.3V at V
CC
2.7V; V
X
= V
OL
+ 0.1 V
CC
at V
CC
V
Y
= V
OH
–0.3V at V
CC
2.7V; V
Y
= V
OH
– 0.1 V
CC
at V
CC
2.7V; V
= 0.5 V
at V
2.7V.
2.7V
2.7V
SW00051
1An, 2An
INPUT
V
M
t
PHL
t
PLH
V
OL
V
I
V
M
GND
V
OH
1Yn, 2Yn
OUTPUT
Waveform 1. Input (nAn) to output (nYn) propagation times
t
PLZ
t
PZL
V
I
2OE, 3OE
INPUT
GND
V
CC
OUTPUT
LOW-to-OFF
OFF-to-LOW
V
OL
V
OH
OUTPUT
HIGH-to-OFF
OFF-to-HIGH
GND
outputs
enabled
outputs
enabled
outputs
disabled
t
PHZ
V
M
V
M
V
M
t
PZH
V
X
V
Y
SW00053
Waveform 2. 3-State enable and disable times for the input
(2OE, 3OE)
t
PLZ
t
PZL
V
I
1OE, 4OE
INPUT
GND
V
CC
OUTPUT
LOW-to-OFF
OFF-to-LOW
V
OL
V
OH
OUTPUT
HIGH-to-OFF
OFF-to-HIGH
GND
outputs
enabled
outputs
enabled
outputs
disabled
t
PHZ
V
M
V
M
V
M
t
PZH
V
X
V
Y
SW00052
Waveform 3. 3-State enable and disable times for the input
(1OE, 4OE)
TEST CIRCUIT
PULSE
GENERATOR
R
T
V
IN
D.U.T.
V
OUT
C
L
V
CC
R
L
=500
SWITCH POSITION
TEST
t
PLH
/t
PHL
t
PLZ
/t
PZL
t
PHZ
/t
PZH
SWITCH
Open
2
V
CC
GND
Test Circuit for 3-State Outputs
Open
GND
S
1
2
V
CC
DEFINITIONS
R
L
= Load resistor
C
L
= Load capacitance includes jig and probe capacitance
R
T
=Termination resistance should be equal to Z
OUT
of pulse generators.
V
CC
2.7V
2.7 – 3.6V
V
IN
V
CC
2.7V
SW00047
R
L
=500
Waveform 4. Load circuitry for switching times
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