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參數(shù)資料
| 型號： | UZZ9001 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 模擬信號調(diào)理 |
| 英文描述： | Sensor Conditioning Electronic(傳感器調(diào)節(jié)芯片) |
| 中文描述： | SPECIALTY ANALOG CIRCUIT, PDSO24 |
| 封裝： | SO-24 |
| 文件頁數(shù)： | 5/16頁 |
| 文件大小： | 72K |
| 代理商： | UZZ9001 |
2000 May 19
5
Philips Semiconductors
Preliminary specification
Sensor Conditioning Electronic
UZZ9001
handbook, full pagewidth
MHB698
ADC1
DECIMATION
FILTER
ALU
SPI
CLK
CS
data
DATA-CLK
SMODE
CONTROL
OSCILLATOR
+
VO1
VO1
ADC2
RESET
UZZ9001
reset
DECIMATION
FILTER
+
VO2
VO2
Fig.1 Block diagram.
The following list gives a short description of the relevant
block functions:
1.
The ADC block contains two Sigma Delta AD
converters, sensor offset correction circuitry and the
circuitry required for the sensitivity and offset
adjustment of the chip output voltage curve.
Two digital low pass decimation filters convert the low
resolution high speed bit stream coming from the ADC
Sigma Delta converters into a low speed digital word.
The ALU block derives an angle value from the two
digital inputs using the CORDIC algorithm.
The SPI converts the output of the ALU block to a SPI
compatible 16 bit word.
The CONTROL block provides the clock and the
control signals for the chip.
The RESET block supplies a reset signal during
power-up and power-down when the power supply is
below a certain value.
The Oscillator unit generates the master clock.
2.
3.
4.
5.
6.
7.
Serial Peripheral interface (SPI)
The UZZ9001 provides an interface to SPI compatible
devices, and as a slave node functions in one operational
mode only. For Motorola SPI devices, this mode is
selected by setting CPHA to 1 and CPOL to 1. In this
transfer mode, data bits are sampled by the master using
the leading edge of the clock as shown in Figure 2. The
falling edge indicates that the next data bit has to be
provided by the slave device (shift operation).
AnadvantageofthismodeisthattheCSinputtogglesonly
once between every two sensor data bytes (see Fig.3).
Data transmission can be stopped by the user at any time.
The leading edge of the CS input initialises the SPI shift
register allowing the start of a complete new transmission.
If the CS line is held active low during stop of transmission,
resumption of transmission can be made without loss of
data
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