- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄297645 > UT6264C(E) 4 Mb (512K x 8, 256K x 16) Boot Sector, Flash Memory PDF資料下載
參數(shù)資料
| 型號(hào)： | UT6264C(E) |
| 英文描述： | 4 Mb (512K x 8, 256K x 16) Boot Sector, Flash Memory |
| 中文描述： | 異步靜態(tài)RAM高速 |
| 文件頁(yè)數(shù)： | 9/13頁(yè) |
| 文件大?。?/td> | 132K |
| 代理商： | UT6264C(E) |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)當(dāng)前第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)
UTRON
UT6264C
Rev. 1.4
8K X 8 BIT LOW POWER CMOS SRAM
UTRON TECHNOLOGY INC.
P80028
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
4
CAPACITANCE (TA=25J , f=1.0MHz)
PARAMETER
SYMBOL
MIN.
MAX
UNIT
Input Capacitance
CIN
-
8
pF
Input/Output Capacitance
CI/O
-
10
pF
Note : These parameters are guaranteed by device characterization, but not production tested.
AC TEST CONDITIONS
Input Pulse Levels
0V to 3.0V
Input Rise and Fall Times
5ns
Input and Output Timing Reference Levels
1.5V
Output Load
CL = 100pF, IOH/IOL = -1mA/4mA
AC ELECTRICAL CHARACTERISTICS (VCC = 4.5V~5.5V, TA = 0J to 70J/ -20J to 85J (E))
(1) READ CYCLE
UT6264C-35
UT6264C-70
PARAMETER
SYMBOL
MIN.
MAX.
MIN.
MAX.
UNIT
Read Cycle Time
tRC
35
-
70
-
ns
Address Access Time
tAA
-
35
-
70
ns
Chip Enable Access Time
tACE
-
35
-
70
ns
Output Enable Access Time
tOE
-
25
-
35
ns
Chip Enable to Output in Low-Z
tCLZ*
10
-
10
-
ns
Output Enable to Output in Low-Z
tOLZ*
5
-
5
-
ns
Chip Disable to Output in High-Z
tCHZ*
-
25
-
35
ns
Output Disable to Output in High-Z
tOHZ*
-
25
-
35
ns
Output Hold from Address Change
tOH
5
-
5
-
ns
(2) WRITE CYCLE
UT6264C-35
UT6264C-70
PARAMETER
SYMBOL
MIN.
MAX.
MIN.
MAX.
UNIT
Write Cycle Time
tWC
35
-
70
-
ns
Address Valid to End of Write
tAW
30
-
60
-
ns
Chip Enable to End of Write
tCW
30
-
60
-
ns
Address Set-up Time
tAS
0
-
0
-
ns
Write Pulse Width
tWP
25
-
50
-
ns
Write Recovery Time
tWR
0
-
0
-
ns
Data to Write Time Overlap
tDW
20
-
30
-
ns
Data Hold from End of Write-Time
tDH
0
-
0
-
ns
Output Active from End of Write
tOW*
5
-
5
-
ns
Write to Output in High-Z
tWHZ*
-
15
-
25
ns
*These parameters are guaranteed by device characterization, but not production tested.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| UT63M105PCX | 4 Mb (512K x 8, 256K x 16) Boot Sector, Flash Memory |
| UT63M105PCX5 | Transceiver |
| UT63M105PQA | Transceiver |
| UT63M105PQC | 8 Mb (1M x 8, 512K x 16) Boot Sector, Flash Memory |
| UT63M105PQX | Transceiver |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| UT6264CPC-35 | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:8K X 8 BIT LOW POWER CMOS SRAM |
| UT6264CPC-35L | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:8K X 8 BIT LOW POWER CMOS SRAM |
| UT6264CPC-35LL | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:8K X 8 BIT LOW POWER CMOS SRAM |
| UT6264CPC-70 | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:8K X 8 BIT LOW POWER CMOS SRAM |
| UT6264CPC-70L | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:8K X 8 BIT LOW POWER CMOS SRAM |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。