參數(shù)資料
型號： UPD784916AGF
廠商： NEC Corp.
英文描述： 16-BIT SINGLE-CHIP MICROCONTROLLERS
中文描述： 16位單晶片微控制器
文件頁數(shù)： 49/86頁
文件大?。?/td> 446K
代理商： UPD784916AGF
μ
PD784915A, 784916A
49
4. INTERNAL/EXTERNAL CONTROL FUNCTION
4.1 Interrupt Function
The
μ
PD784916A has as many as 30 interrupt sources, including internal and external sources. For 26 sources,
a high-speed interrupt processing mode such as context switching or macro service can be specified by software.
Table 4-1 lists the interrupt sources.
Table 4-1. Interrupt Sources
Interrupt
Request
Type
Reset
Non-
maskable
Maskable
Operand
error
Software
Vector
Table
Address
0000H
0002H
0006H
0008H
000AH
000CH
000EH
0010H
0012H
0014H
0016H
0018H
001AH
001CH
0020H
0022H
0024H
0026H
0028H
002AH
002CH
002EH
0030H
0034H
0036H
003AH
003CH
003EH
-
Priority
-
-
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
-
-
-
Interrupt Request Source
Macro Service
Control Word
Address
-
-
FE06H
FE08H
FE0AH
FE0CH
FE0EH
FE10H
FE12H
FE14H
FE16H
FE18H
FE1AH
FE1CH
FE20H
FE22H
FE24H
FE26H
FE28H
FE2AH
FE2CH
FE2EH
FE30H
FE34H
FE36H
FE3AH
-
-
-
Context
Switching
No
Yes
No
Yes
Macro
Service
No
Yes
No
Interrupt
Control Reg-
ister Name
-
-
PIC0
CPTIC3
CPTIC2
CRIC12
CRIC00
CLRIC1
CRIC10
CRIC01
CRIC02
CRIC11
CPTIC1
CRIC20
TBIC
ADIC
PIC2
CRIC40
UDCIC
CRIC30
CRIC50
CRIC13
CSIIC1
WIC
PIC1
PIC3
CSIIC2
-
-
-
Name
RESET
NMI
INTP0
INTCPT3
INTCPT2
INTCR12
INTCR00
INTCLR1
INTCR10
INTCR01
INTCR02
INTCR11
INTCPT1
INTCR20
INTTB
INTAD
INTP2
INTCR40
INTUDC
INTCR30
INTCR50
INTCR13
INTCSI1
INTW
INTP1
INTP3
INTCSI2
-
-
-
Trigger
RESET pin input
NMI pin input edge
INTP0 pin input edge
EDVC output signal (CPT3 capture)
DFGIN pin input edge (CPT2 capture)
PBCTL input edge/EDVC output signal (CR12
capture)
TM0-CR00 coincidence signal
CSYNCIN pin input edge
TM1-CR10 coincidence signal
TM0-CR01 coincidence signal
TM0-CR02 coincidence signal
TM1-CR11 coincidence signal
Pin input edge/EC output signal (CPT1 cap-
ture)
TM2-CR20 coincidence signal
Time base from FRC
A/D converter conversion end
INTP2 pin input edge
TM4-CR40 coincidence signal
UDC-UDCC coincidence/UDC underflow
TM3-CR30 coincidence signal
TM5-CR50 coincidence signal
TM1-CR13 coincidence signal
End of serial transfer (channel 1)
Overflow of watch timer
INTP1 pin input edge
INTP3 pin input edge
End of serial transfer (channel 2)
Illegal operand of MOV STBC, #byte or
LOCATION instruction
Execution of BRK instruction
Execution of BRKCS instruction
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