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參數(shù)資料
| 型號： | UPD75212A |
| 廠商： | NEC Corp. |
| 英文描述： | 4-BIT SINGLE-CHIP MICROCOMPUTER |
| 中文描述： | 4位單片機 |
| 文件頁數(shù)： | 15/70頁 |
| 文件大?。?/td> | 516K |
| 代理商： | UPD75212A |
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15
μ
PD75212A
Fig. 4-1 Program Memory Map
MBE RBE
MBE RBE
MBE RBE
MBE RBE
MBE RBE
MBE RBE
MBE RBE
MBE
6
INTBT/INT4 Start Address
INTBT/INT4 Start Address
INT0 Start Address
INT0 Start Address
INT1 Start Address
INT1 Start Address
Internal Reset Start Address (Most Significant 6 Bits)
Internal Reset Start Address (Least Significant 8 Bits)
(Most Significant 6 Bits)
(Least Significant 8 Bits)
(Most Significant 6 Bits)
(Least Significant 8 Bits)
(Most Significant 6 Bits)
(Least Significant 8 Bits)
(Most Significant 6 Bits)
(Least Significant 8 Bits)
(Most Significant 6 Bits)
(Least Significant 8 Bits)
(Most Significant 6 Bits)
(Least Significant 8 Bits)
(Most Significant 6 Bits)
(Least Significant 8 Bits)
INTCSIO Start Address
INTCSIO Start Address
INTT0 Start Address
INTT0 Start Address
INTTPG Start Address
INTTPG Start Address
INTKS Start Address
INTKS Start Address
GETI Instruction Reference Table
0002H
0004H
0006H
0008H
000AH
000CH
000EH
0000H
0020H
007FH
0080H
07FFH
0800H
0FFFH
1000H
1FFFH
2000H
2F7FH
CALLF
!faddr
Instruction
Entry Address
BRCB
!caddr
Instruction
Branch Address
BR !addr
Instruction
Branch Address
CALL !addr
Instruction
Subroutine Entry
Address
BR $ addr Instruction
Relative Branch
Address
(-15 to -1 and +2 to +16)
BRCB
!caddr Instruction
Branch Address
BRCB
!caddr Instruction
Branch Address
Branch Destination
Address and
Subroutine Entry
Address to be Set
by GETI Instruction
Address
7
RBE
0
Remarks
In all cases other than those listed above, branch to the address with only the lower 8 bits of the PC
changed is enabled by BR PCDE and BR PCXA instructions.
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