![](http://datasheet.mmic.net.cn/370000/UPD75008_datasheet_16740754/UPD75008_35.png)
μ
PD75004, 75006, 75008
35
(3)
Symbols in addressing area field
*1
MB = MBE . MBS
(MBS = 0, 1, 15)
MB = 0
MBE = 0 : MB = 0 (00H-7FH)
MB = 15 (80H-FFH)
MBE = 1 : MB = MBS (MBS = 0, 1, 15)
*2
*3
Data memory
addressing
*4
MB = 15, fmem = FB0H-FBFH,
FF0H-FFFH
*5
*6
MB = 15, pmem = FC0H-FFFH
addr = 000H-FFFH (
μ
PD75004)
0000H-177FH (
μ
PD75006)
0000H-1F7FH (
μ
PD75008)
addr = (Current PC) – 15 to (Current PC) – 1
(Current PC) + 2 to (Current PC) + 16
caddr = 000H-FFFH (
μ
PD75004)
0000H-0FFFH (PC
12
= 0 :
μ
PD75006, 75008)
0000H-177FH (PC
12
= 1 :
μ
PD75006)
0000H-1F7FH (PC
12
= 1 :
μ
PD75008)
faddr = 0000H-07FFH
taddr = 0020H-007FH
*7
Program
memory
addressing
*8
*9
*10
Remarks
1:
MB indicates memory bank that can be accessed.
In *2, MB = 0 regardless of MBE and MBS.
In *4 and *5, MB = 15 regardless of MBE and MBS.
*6 to *10 indicate areas that can be addressed.
2:
3:
4:
(4)
Machine cycle field
In this field, S indicates the number of machine cycles required when an instruction having a skip
function skips. The value of S varies as follows:
When no instruction is skipped ........................................................................
When 1-byte or 2-byte instruction is skipped.................................................
When 3-byte instruction (BR ! addr or CALL ! addr) is skipped ..................
S = 0
S = 1
S = 2
Note : The GETI instruction is skipped in one machine cycle.
One machine cycle equals to one cycle of the CPU clock
Φ
, (=t
CY
), and can be changed in three steps
depending on the setting of the processor clock control register (PCC).