CHAPTER 5 APPLICATION EXAMPLES
Application Note U17121EJ1V1AN
79
5.5.5 IDE HDD access sample program list
///////////////////////////////////////////////////////////////////////////////
// IDE HDD access sample //
// Overview: Issues ATA commands to HDD, which is ATA device, via PCI-IDE //
// ASIC board connected to PCI slot of evaluation board. //
// ATA commands to be issued are as follows. //
// //
// IDLE IMMEDIATE, IDENTIFY DEVICE, SET FEATURE, //
// READ SECTOR(S), WRITE SECTOR(S), READ DMA, WRITE DMA //
// //
// ATA command is executed by executing device selection //
// protocol to determine that command is issued to either //
// Master Device or Slave Device. ATA command is issued //
// and data is transferred using transfer protocol //
// corresponding to each ATA command. Four transfer //
// protocols, PIO datain transfer, PIO dataout transfer, //
// PIO nondata transfer, and DMA transfer, are available. //
// //
// This sample program is provided with device selection //
// protocol and four transfer protocols as functions. //
// Corresponding transfer protocol function is called //
// from function processing each ATA command. //
// //
///////////////////////////////////////////////////////////////////////////////
/////////////////////////////////////////////////////
// PCI-IDE ASIC board register address definition //
/////////////////////////////////////////////////////
//////////////////////
// IDE Command Area //
//////////////////////
#define IDEREG_DATA
#define IDEREG_ERROR
#define IDEREG_ERROR_ERR_BIT
#define IDEREG_FEATURES
#define IDEREG_SECTOR_COUNT
#define IDEREG_SECTOR_NUMBER
#define IDEREG_CYLINDER_LOW
#define IDEREG_CYLINDER_HIGH
#define IDEREG_DEVICE_HEAD
#define IDEREG_STATUS
#define IDEREG_COMMAND
//////////////////////
// IDE Control Area //
//////////////////////
((VUWORD*)(BASE_ADDRESS_PCI_IO + 0x00))
((VUBYTE*)(BASE_ADDRESS_PCI_IO + 0x01))
(0x01)
((VUBYTE*)(BASE_ADDRESS_PCI_IO + 0x01))
((VUBYTE*)(BASE_ADDRESS_PCI_IO + 0x02))
((VUBYTE*)(BASE_ADDRESS_PCI_IO + 0x03))
((VUBYTE*)(BASE_ADDRESS_PCI_IO + 0x04))
((VUBYTE*)(BASE_ADDRESS_PCI_IO + 0x05))
((VUBYTE*)(BASE_ADDRESS_PCI_IO + 0x06))
((VUBYTE*)(BASE_ADDRESS_PCI_IO + 0x07))
((VUBYTE*)(BASE_ADDRESS_PCI_IO + 0x07))