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型號(hào)：	UPD70F3114GCA-8EU
廠商：	NEC Corp.
英文描述：	32-Bit Single-Chip Microcontrollers
中文描述：	32位單芯片微控制器
文件頁(yè)數(shù)：	107/692頁(yè)
文件大?。?/td>	3176K
代理商：	UPD70F3114GCA-8EU

CHAPTER 6 DMA FUNCTIONS (DMA CONTROLLER)

User’s Manual U15195EJ5V0UD

6.3 Control Registers

6.3.1 DMA source address registers 0 to 3 (DSA0 to DSA3)

These registers are used to set the DMA source addresses (28 bits each) for DMA channel n (n = 0 to 3). They

are divided into two 16-bit registers, DSAnH and DSAnL.

Since these registers are configured as 2-stage FIFO buffer registers, a new source address for DMA transfer can

be specified during DMA transfer. (Refer to

6.8 Next Address Setting Function

.) In this case, if a new DSAn

and the TCn bit of DMA channel control register n (DCHCn) has been set to 1 or the INITn bit of the DCHCn register

has been set to 1 (n = 0 to 3).

(1) DMA source address registers 0H to 3H (DSA0H to DSA3H)

These registers can be read/written in 16-bit units.

Be sure to set bits 14 to 12 to 0. If they are set to 1, the operation is not guaranteed.

Cautions 1. When setting an address of an on-chip peripheral I/O register for the source address, be

sure to specify an address between FFFF000H and FFFFFFFH. An address of the on-

chip peripheral I/O register image (3FFF000H to 3FFFFFFH) must not be specified.

2. Do not set the DSAnH register while DMA is suspended.

SA27 SA26 SA25 SA24 SA23 SA22 SA21 SA20 SA19 SA18 SA17 SA16

SA27 SA26 SA25 SA24 SA23 SA22 SA21 SA20 SA19 SA18 SA17 SA16

SA27 SA26 SA25 SA24 SA23 SA22 SA21 SA20 SA19 SA18 SA17 SA16

Bit position

Specifies the DMA source address.

0: External memory, on-chip peripheral I/O

1: Internal RAM

Sets the DMA source addresses (A27 to A16). During DMA transfer, it stores the next

DMA transfer source address.

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相關(guān)代理商/技術(shù)參數(shù)	參數(shù)描述
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UPD70F3116GJ-UEN	制造商:Renesas Electronics Corporation 功能描述:

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