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參數(shù)資料
| 型號： | UPD7030025AGC-33 |
| 廠商： | NEC Corp. |
| 英文描述： | LJT 29C 29#16 PIN PLUG |
| 中文描述： | 32位RISC微控制器 |
| 文件頁數(shù)： | 2/4頁 |
| 文件大?。?/td> | 32K |
| 代理商： | UPD7030025AGC-33 |
Functional Block Description
The internal CPU, based on Harvard architechture, is a very compact 32-bit RISC engine.
Most instructions are executed in a single clock cycle under control of a 5-stage pipeline.
It also includes a 16 x 16-bit hardware multiplier with 32-bit result and saturation logic. A
32-bit barrel shifter and bit manipulation instructions accelerate complex bit operations.
The BCU initiates the bus cycles based on the physical addresses generated by the CPU.
When an instruction stored in external memory is executed and no bus cycle initiation is
requested by the CPU, the BCU creates a prefetch address to prefetch an instruction code
which is then inserted in the internal instruction queue.
The internal RAM, with a capacity of 4 or 8 Kbytes, is mapped from address FFFFE000H.
The CPU can access any data in one clock cycle.
The internal ROM (96 or 128 Kbytes) or Flash ROM (128 or 256 Kbytes) is mapped from
00000000H. The CPU can access any instruction from the ROM/Flash ROM in one clock cycle.
The Flash memory can be written and erased electrically.
The V853 has 67 input/output port pins that can be used alternatively as control pins.
The interrupt controller handles the interrupt request issued by internal peripheral
hardware and external sources. Up to 8 interrupt priority levels can be specified for each
interrupt request.
The clock generator produces the CPU operating clock. The internal frequency can be
selected as 5x or 1x of crystal frequency by using the internal PLL or 1/2x crystal frequency
without PLL. An external clock can be used instead of the clock generator. A clock-out
signal is available.
The RPU includes a 5-channel 16-bit timer/counter unit.
The serial interface includes two channels of CSI (Clocked Serial Interface) and two channels
which can be operated in the UART (Asynchronous Serial Interface) or the CSI mode. The
UART transfers data via the TxD and RxD pins. The baud rate is determined by the on-chip
dedicated baud rate generator The CSI transfers data via the SO, SI and SCK pins at a baud
rate determined by the on-chip dedicated baud rate generator or an external clock.
An 8-channel A/D converter with 10-bit resolution and a 2-channel 8-bit D/A converter are
A 2-channel PWM unit with different operating modes is available on chip.
CPU
Bus Control Unit
(BCU)
RAM
Serial Interface
Clock Generator
Real-time Pulse
Unit (RPU)/Timers
PROM Programming
Ports
Interrupt Controller
ROM
A/D Converter
PWM
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| UPD703002GC-25-XXX-7EA | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:32-Bit Microcontroller |
| UPD703002GC-25-XXX-8EU | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:32-Bit Microcontroller |
| UPD703003 | 制造商:NEC 制造商全稱:NEC 功能描述:V853TM 32/16-BIT SINGLE-CHIP MICROCONTROLLER |
| UPD703003A | 制造商:NEC 制造商全稱:NEC 功能描述:V853TM 32-/16-BIT SINGLE-CHIP MICROCONTROLLERS |
| UPD703003AGC(A)-33-XXX-8EU | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:MICROCONTROLLER|32-BIT|V850 CPU|CMOS|QFP|100PIN|PLASTIC |
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