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參數(shù)資料
| 型號(hào)： | UPD6604GS |
| 廠商： | NEC Corp. |
| 英文描述： | 4-BIT SINGLE-CHIP MICROCONTROLLER FOR INFRARED REMOTE CONTROL TRANSMISSION |
| 中文描述： | 4位單片機(jī)的紅外遙控傳輸 |
| 文件頁(yè)數(shù)： | 11/64頁(yè) |
| 文件大?。?/td> | 268K |
| 代理商： | UPD6604GS |
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11
μ
PD6604
Data Sheet U11281EJ3V0DS00
Figure 2-4. Data Memory Organization
R0
R1
R2
R3
R4
R5
R6
R7
R8
R9
RA
RB
RC
RD
RE
RF
R
10
R
00
R
11
R
01
R
12
R
02
R
13
R
03
R
14
R
04
R
15
R
05
R
16
R
06
R
17
R
07
R
18
R
08
R
19
R
09
R
1A
R
0A
R
1B
R
0B
R
1C
R
0C
R
1D
R
0D
R
1E
R
0E
R
1F
R
0F
→
DP (see
2.6 Data Pointer (DP)
)
→
ASR (see
2.3 Address Stack Register (ASR (RF))
)
R
1n
(high-order 4 bits) R
0n
(low-order 4 bits)
2.6 Data Pointer (DP): 10 Bits
The ROM data table can be referenced by setting the ROM address in the data pointer to call the ROM contents.
The low-order 8 bits of the ROM address are specified by R0 of the data memory; and the high-order 2 bits by
bits 4 and 5 of the P3 register (CR0).
When reset, the pointer contents become “000H”.
Figure 2-5. Data Pointer Organization
R
00
DP
9
DP
8
DP
7
DP
6
DP
5
DP
4
DP
3
DP
2
DP
1
DP
0
R
10
P3
R0
b
4
b
5
P3
Register
2.7 Accumulator (A): 4 Bits
The accumulator, which refers to a register consisting of 4 bits, plays a leading role in performing various
operations.
When reset, the accumulator contents are left undefined.
Figure 2-6. Accumulator Organization
A
3
A
2
A
1
A
0
A
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