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參數(shù)資料
| 型號： | UPD444008LLE-A8 |
| 廠商： | NEC Corp. |
| 英文描述： | 4M-BIT CMOS FAST SRAM 512K-WORD BY 8-BIT |
| 中文描述： | 4分位CMOS快速靜態(tài)存儲器為512k - Word的8位 |
| 文件頁數(shù)： | 10/16頁 |
| 文件大小： | 102K |
| 代理商： | UPD444008LLE-A8 |
10
μ
PD444008L
Data Sheet M14429EJ4V0DS
Write Cycle Timing Chart 2 (/CS Controlled)
t
WC
t
AS
t
CW
t
AW
t
WP
t
WR
t
DW
t
DH
Address (Input)
/CS (Input)
/WE (Input)
I/O (Input)
High impedance
Data in
High impedance
Cautions 1. /CS or /WE should be fixed to high level during address transition.
2. Do not input data to the I/O pins while they are in the output state.
Remark
Write operation is done during the overlap time of a low level /CS and a low level /WE.
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