參數(shù)資料
型號(hào)： UPD44165084F5-E60-EQ1
廠商： NEC Corp.
英文描述： 18M-BIT QDRII SRAM 4-WORD BURST OPERATION
中文描述： 1800萬(wàn)位推出QDRII SRAM的4個(gè)字爆發(fā)運(yùn)作
文件頁(yè)數(shù)： 1/32頁(yè)
文件大小： 392K
代理商： UPD44165084F5-E60-EQ1
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The information in this document is subject to change without notice. Before using this document, please
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MOS INTEGRATED CIRCUIT
μ
PD
44165084, 44165184, 44165364
18M-BIT QDR
TM
II SRAM
4-WORD BURST OPERATION
Document No. M15825EJ7V
1
DS00 (7th edition)
Date Published
Jul
y
2004 NS CP(K)
Printed in Japan
DATA SHEET
2001
Description
The
μ
PD44165084 is a 2,097,152-word by 8-bit, the
μ
PD44165184 is a 1,048,576-word by 18-bit and the
μ
PD44165364 is a 524,288-word by 36-bit synchronous quad data rate static RAM fabricated with advanced CMOS
technology using full CMOS six-transistor memory cell.
The
μ
PD44165084,
μ
PD44165184 and
μ
PD44165364 integrates unique synchronous peripheral circuitry and a
burst counter. All input registers controlled by an input clock pair (K and /K) are latched on the positive edge of K and
/K.
These products are suitable for application which require synchronous operation, high speed, low voltage, high
density and wide bit configuration.
These products are packaged in 165-pin PLASTIC BGA.
Features
1.8 ± 0.1 V power supply and HSTL I/O
DLL circuitry for wide output data valid window and future frequency scaling
Separate independent read and write data ports with concurrent transactions
100% bus utilization DDR READ and WRITE operation
Four-tick burst for reduced address frequency
Two input clocks (K and /K) for precise DDR timing at clock rising edges only
Two output clocks (C and /C) for precise flight time
and clock skew matching-clock and data delivered together to receiving device
Internally self-timed write control
Clock-stop capability with
μ
s restart
User programmable impedance output
Fast clock cycle time : 4.0 ns (250 MHz) , 5.0 ns (200 MHz) , 6.0 ns (167 MHz)
Simple control logic for easy depth expansion
JTAG boundary scan
相關(guān)PDF資料
PDF描述
UPD44165184F5-E60-EQ1 18M-BIT QDRII SRAM 4-WORD BURST OPERATION
UPD44165084 18M-BIT QDRII SRAM 4-WORD BURST OPERATION
UPD44165364F5-E50-EQ1 18M-BIT QDRII SRAM 4-WORD BURST OPERATION
UPD44165364F5-E60-EQ1 18M-BIT QDRII SRAM 4-WORD BURST OPERATION
UPD44324082F5-E37-EQ2 36M-BIT DDRII SRAM 2-WORD BURST OPERATION
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UPD44165092BF5-E40-EQ3-A 制造商:Renesas Electronics Corporation 功能描述:2MX9, 2BURST, 250 MHZ QDRII SRAM - Trays
UPD44165094BF5-E40-EQ3-A 制造商:Renesas Electronics Corporation 功能描述:SRAM Chip Sync Dual 1.8V 18M-Bit 2M x 9-Bit 0.45ns 165-Pin BGA
UPD44165362BF5-E40-EQ3 制造商:Renesas Electronics Corporation 功能描述:UPD44165362BF5-E40-EQ3 - Trays
UPD44165362BF5-E40-EQ3-A 制造商:Renesas Electronics Corporation 功能描述:SRAM Chip Sync Dual 1.8V 18M-Bit 512K x 36 0.45ns 165-Pin BGA
UPD44321182GF-A50(A) 制造商:Renesas Electronics Corporation 功能描述:
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