參數(shù)資料
型號: UPD3725AD
廠商: NEC Corp.
英文描述: 5000-BIT x 3 CCD COLOR LINEAR IMAGE SENSOR
中文描述: 5000位x 3 CCD彩色線性圖像傳感器
文件頁數(shù): 12/22頁
文件大小: 183K
代理商: UPD3725AD
12
μ
PD3725A
Recommended Timing (High speed drive f
φ
R1B
, f
φ
R2B
= 5 to 8 MHz)
(Unit: ns)
Symbol
MIN.
TYP.
MAX.
t
21
, t
31
0
10
t
22
, t
32
0
30
t
23
, t
25
, t
33
, t
35
0
5
t
24
, t
34
20
t
30
/2
t
26
, t
36
10
20
t
27
, t
37
0
10
t
30
60
100
Caution
When driving
μ
PD3725A according to timing shown in TIMING CHART 3 at high speed, period
of signal output is shorten, therefore data may not be sampled normally.
To sample data normally, drive
μ
PD3725A according to timing shown in TIMING CHART 5. To
extend the period of signal output, falling edge of last gate shift register clock
φ
1L,
φ
2L should
be earlier than that of shift register clock
φ
1A,
φ
2A.
When making the falling edge of
φ
1L,
φ
2L early, output signal is effected by noise from reset clock
φ
R1B,
φ
R2B. To avoid the effection of this noise, the falling edge of
φ
R1B,
φ
R2B should be set
earlier.
Driving at high speed, drive capability is necessary to be powered up. So design the peripheral
circuit referring to peripheral circuit example 2.
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