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參數(shù)資料
| 型號： | UPD23C128040LGY-MKH |
| 英文描述： | x8 or x16 ROM (Mask Programmable) |
| 中文描述： | x8或x16光盤（掩?？删幊蹋?/td> |
| 文件頁數(shù)： | 11/16頁 |
| 文件大小： | 151K |
| 代理商： | UPD23C128040LGY-MKH |
4
PD23C128000L
Data Sheet M13644EJ3V0DS00
Input / Output Pin Functions
Pin name
Input / Output
Function
WORD, /BYTE
Input
The pin for switching WORD mode and BYTE mode.
High level : WORD mode (8M-word by 16-bit)
Low level : BYTE mode (16M-word by 8-bit)
A0 to A22
(Address inputs)
Input
Address input pins.
A0 to A22 are used differently in the WORD mode and the BYTE mode.
WORD mode (8M-word by 16-bit)
A0 to A22 are used as 23 bits address signals.
BYTE mode (16M-word by 8-bit)
A0 to A22 are used as the upper 23 bits of total 24 bits of address signal.
(The least significant bit (A
1) is combined to O15.)
O0 to O7, O8 to O14
(Data outputs)
Output
Data output pins.
O0 to O7, O8 to O14 are used differently in the WORD mode and the BYTE mode.
WORD mode (8M-word by 16-bit)
The lower 15 bits of 16 bits data outputs to O0 to O14.
(The most significant bit (O15) combined to A
1.)
BYTE mode (16M-word by 8-bit)
8 bits data outputs to O0 to O7 and also O8 to O14 are high impedance.
O15, A
1
(Data output 15,
LSB Address input)
Output, Input
O15, A
1 are used differently in the WORD mode and the BYTE mode.
WORD mode (8M-word by 16-bit)
The most significant output data bus (O15).
BYTE mode (16M-word by 8-bit)
The least significant address bus (A
1).
/CE
(Chip Enable)
Input
Chip activating signal.
When the OE is active, output states are following.
High level : High impedance
Low level : Data out
/OE, OE, DC
(Output Enable, Don’t Care)
Input
Output enable signal. The active level of OE is mask option. The active level of OE
can be selected from high active, low active and Don’t care at order.
VCC
Supply voltage
GND
Ground
相關PDF資料 |
PDF描述 |
|---|---|
| UPD23C128040LGY-XXX-MJ | x8 or x16 ROM (Mask Programmable) |
| UPD23C128040LGY-XXX-MK | XWAY™ ADM8513 |
| UPD23C16000ALGX-XXX | x8 or x16 ROM (Mask Programmable) |
| UPD23C16000ALGY-XXX-MJ | XWAY™ AR7 - PSB 7300A, PSB 7200, PSB 7100-U2, PSB 7100-A2 |
| UPD23C16000ALGY-XXX-MK | 100 mA < Ic = 500 mA; Package: PG-SOT23-3; Polarity: NPN; V<sub>CEO</sub> (max): 45.0 V; P<sub>tot</sub> (max): 500.0 mW; h<sub>FE</sub> (min): 160.0 - 400.0; I<sub>C</sub>: 100.0 mA; |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| UPD23C128040LGY-XXX-MJ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 or x16 ROM (Mask Programmable) |
| UPD23C128040LGY-XXX-MK | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 or x16 ROM (Mask Programmable) |
| UPD23C128080BL | 制造商:NEC 制造商全稱:NEC 功能描述:128M-BIT MASK-PROGRAMMABLE ROM 16M-WORD BY 8-BIT (BYTE MODE) / 8M-WORD BY 16-BIT (WORD MODE) PAGE ACCESS MODE |
| UPD23C128080BLGX | 制造商:NEC 制造商全稱:NEC 功能描述:128M-BIT MASK-PROGRAMMABLE ROM 16M-WORD BY 8-BIT (BYTE MODE) / 8M-WORD BY 16-BIT (WORD MODE) PAGE ACCESS MODE |
| UPD23C128080BLGX-XXX | 制造商:NEC 制造商全稱:NEC 功能描述:128M-BIT MASK-PROGRAMMABLE ROM 16M-WORD BY 8-BIT (BYTE MODE) / 8M-WORD BY 16-BIT (WORD MODE) PAGE ACCESS MODE |
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