參數(shù)資料
型號: UPD17P136BGT
元件分類: 微控制器/微處理器
英文描述: MICROCONTROLLER, PDSO28
封裝: 0.375 INCH, PLASTIC, SOP-28
文件頁數(shù): 11/25頁
文件大?。?/td> 666K
代理商: UPD17P136BGT
19
IDT72V205/72V215/72V225/72V235/72V245 3.3V CMOS SyncFIFOTM
256 x 18, 512 x 18, 1,024 x 18, 2,048 x 18 and 4,096 x 18
COMMERCIALANDINDUSTRIAL
TEMPERATURERANGES
Figure 22. Synchronous Programmable Almost-Empty Flag Timing (IDT Standard and FWFT Modes)
NOTES:
1. n =
PAE offset.
2. For IDT Standard Mode.
3. For FWFT Mode.
4. tSKEW2 is the minimum time between a rising WCLK edge and a rising RCLK edge for
PAE to go HIGH during the current clock cycle. If the time between the rising edge of WCLK
and the rising edge of RCLK is less than tSKEW2, then the
PAE deassertion may be delayed one extra RCLK cycle.
5.
PAE is asserted and updated on the rising edge of RCLK only.
6. Select this mode by setting (
FL, RXI, WXI) = (1,0,0), (1,0,1), or (1,1,0) during Reset.
NOTES:
1. m =
PAF offset.
2. D = maximum FIFO Depth.
In IDT Standard Mode: D = 256 for the IDT72V205, 512 for the IDT72V215, 1,024 for the IDT72V225, 2,048 for the IDT72V235 and 4,096 for the IDT72V245.
In FWFT Mode: D = 257 for the IDT72V205, 513 for the IDT72V215, 1,025 for the IDT72V225, 2,049 for the IDT72V235 and 4,097 for the IDT72V245.
3. tSKEW2 is the minimum time between a rising RCLK edge and a rising WCLK edge for
PAF to go HIGH during the current clock cycle. If the time between the rising edge of RCLK
and the rising edge of WCLK is less than tSKEW2, then the
PAF deassertion time may be delayed an extra WCLK cycle.
4.
PAF is asserted and updated on the rising edge of WCLK only.
5. Select this mode by setting (
FL, RXI, WXI) = (1,0,0), (1,0,1), or (1,1,0) during Reset.
Figure 23. Synchronous Programmable Almost-Full Flag Timing (IDT Standard and FWFT Modes)
WCLK
tENH
tCLKH
tCLKL
WEN
PAF
RCLK
REN
4294 drw 23
tENS
tENH
tENS
D- (m + 1) Words in FIFO
D - m Words in FIFO
tPAFS
D- (m + 1)Words
in FIFO
tPAFS
tSKEW2
(3)
tPAFS
WCLK
tENH
tCLKH
tCLKL
WEN
PAE
RCLK
REN
4294 drw 22
tENS
tENH
tENS
n words in FIFO(2),
n + 1words in FIFO(3)
n + 1 words in FIFO(2),
n + 2 words in FIFO(3)
tSKEW2
tPAES
n Words in FIFO(2),
n + 1 words in FIFO(3)
(4)
tPAES
相關(guān)PDF資料
PDF描述
UPD1913C Consumer IC
UPD1943G Consumer IC
UPD1962C Peripheral IC
UPD1963C Peripheral IC
UPD2010AL
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
UPD17P137A 制造商:未知廠家 制造商全稱:未知廠家 功能描述:UPD17134A Subseries User's Manual | User's Manual[12/1996]
UPD17P137ACT 制造商:NEC 制造商全稱:NEC 功能描述:4-BIT SINGLE-CHIP MICROCONTROLLER
UPD17P137AGT 制造商:Renesas Electronics Corporation 功能描述:
UPD17P202AGF-001-3BE 制造商:未知廠家 制造商全稱:未知廠家 功能描述:4-Bit Microcontroller
UPD17P202AGF-002-3BE 制造商:未知廠家 制造商全稱:未知廠家 功能描述:4-Bit Microcontroller