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參數(shù)資料
| 型號： | UPD178P018A |
| 廠商： | NEC Corp. |
| 元件分類： | 8位微控制器 |
| 英文描述： | 8-bit Microcontroller with 2/4/8K Bytes In-System Programmable Flash |
| 中文描述： | 8位微控制器與2/4/8K字節(jié)在系統(tǒng)可編程閃存 |
| 文件頁數(shù)： | 4/60頁 |
| 文件大?。?/td> | 325K |
| 代理商： | UPD178P018A |
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μ
PD178P018A
4
Item
Function
PLL frequency
synthesizer
Division mode
Two types
Direct division mode (VCOL pin)
Pulse swallow mode (VCOH and VCOL pins)
Reference frequency
7 types selectable by program (1, 3, 5, 9, 10, 25, 50 kHz)
Charge pump
Error out output: 2 (EO0 and EO1 pins
Note 1
)
Phase comparator
Unlock detectable by program
Frequency counter
Frequency measurement
AMIFC pin: for 450-kHz count
FMIFC pin: for 450-kHz/10.7-MHz count
D/A converter (PWM output)
8-/9-bit resolution
×
3 channels (shared by 8-bit timer)
Standby function
HALT mode
STOP mode
Reset
Reset via the RESET pin
Internal reset by watchdog timer
Reset by power-ON clear circuit (3-value detection)
Detection of less than 4.5 V
Note 2
(CPU clock: f
X
)
Detection of less than 3.5 V
Note 2
(CPU clock: f
X
/2 or less and on power application)
Detection of less than 2.5 V
Note 2
(in STOP mode)
Power supply voltage
V
DD
= 4.5 to 5.5 V (with PLL operating)
V
DD
= 3.5 to 5.5 V (with CPU operating, CPU clock: f
X
/2 or less)
V
DD
= 4.5 to 5.5 V (with CPU operating, CPU clock: f
X
)
Package
80-pin plastic QFP (14
×
14 mm, 0.65-mm pitch)
80-pin ceramic WQFN (14
×
14 mm, 0.65-mm pitch)
Notes 1.
The EO1 pin can be set to high impedance for the
μ
PD178P018A.
The following figure shows an application example.
PD178P018A
μ
EO0
EO1
VCOH
VCOL
LPF
VCO
To Mixer
LPF : Low path filter
VCO : Voltage controlled oscillator
To lock to a target frequency at high speed
Setting the EO0 and EO1 pins to error out output improves the output current potential and LPF
voltage control potential.
Normal state
Setting only the EO0 pin to error out output maintains the LPF stable.
2.
These voltage values are maximum values. Reset is actually executed at a voltage lower than these
values.
(2/2)
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