參數(shù)資料
型號: UPD178F124
英文描述: 78K/0 Series for Instructions | User's Manual[10/2001]
中文描述: 78K線/ 0系列說明|用戶手冊[10/2001]
文件頁數(shù): 87/129頁
文件大?。?/td> 644K
代理商: UPD178F124
60
CHAPTER 5 EXPLANATION OF INSTRUCTIONS
User's Manual U12326EJ4V0UM
Or
OR
Logical Sum of Byte Data
[Instruction format]
OR dst, src
[Operation]
dst
← dst ∨ src
[Operand]
Mnemonic
Operand(dst,src)
Mnemonic
Operand(dst,src)
OR
A, #byte
OR
A, !addr16
saddr, #byte
A, [HL]
A, r
Note
A, [HL+byte]
r, A
A, [HL+B]
A, saddr
A, [HL+C]
Note Except r = A
[Flag]
ZAC
CY
×
[Description]
The bit-wise logical sum is obtained from the destination operand (dst) specified by the 1st operand and the
source operand (src) specified by the 2nd operand and the result is stored in the destination operand (dst).
If the logical sum shows that all bits are 0, the Z flag is set (1). In all other cases, the Z flag is cleared (0).
[Description example]
OR A, FE98H;
The bit-wise logical sum of the A register and FE98H is obtained and the result is stored in
the A register.
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