參數(shù)資料
型號(hào): UPD16602
廠商: NEC Corp.
英文描述: 312-OUTPUT TFT-LCD FULL COLOR DRIVER
中文描述: 312輸出的TFT - LCD全彩驅(qū)動(dòng)
文件頁(yè)數(shù): 6/16頁(yè)
文件大小: 134K
代理商: UPD16602
6
μ
PD16602
4. NOTES ON USE
(1) In order to prevent latch up breakdown, power should be applied in the order of:
V
DD1
logic input
V
DD2(D), (A)
V
BIAS1,2
, V
COM
analog display signal input, and turned off in the reverse
order.
This order should also be observed in transition periods.
(2) V
SS1
, V
SS2(D)
,
V
SS2(A)
and V
SS2(C)
are connected in the diffusion layer, but also be sure to connect them
externally.
Do not share the sample & hold ground V
SS2(C)
with other ground wiring on the mount board, but connect it to
the edge to the signal board. There is a possibility of high-voltage or logic type noise being superimposed
onto the sample & hold circuit, damaging the analog characteristics (output deviation, etc.).
(3) Likewise, to prevent the sample & hold characteristics from deteriorating, insert a bypass capacitor of 0.1
μ
F
between V
DD1
and V
SS1
, and approximately 0.1
μ
F between V
DD2(D), (A)
and V
SS2(D), (A)
. An unstable power
supply may cause a driver through current, preventing the output range of the output buffer from being
sufficiently secured. Therefore, determine the capacitance of the bypass capacitor after a thorough
evaluation.
(4) When LPC
=
“H”, stable current supply of the output buffer may be shut off, which will impede normal
negative feedback, and when the LCD panel load is small, the output voltage may become abnormal.
Normal operation is assured with approximately 10 k
+ 50 pF, but when the time constant is smaller than
this, please set LPC
=
“L”.
(5) Data input/output relationship
As shown below, irrespective of right shift and left shift.
Output
S
1
S
2
S
3
S
4
S
5
S
6
S
309
S
310
S
311
S
312
Data
D
R0
D
B0
D
G0
D
R1
D
B1
D
G1
D
G2
D
R3
D
B3
D
G3
(6) Bias control method
Externally applying a voltage to pins BIAS
1
and BIAS
2
can control the output buffer current consumption. In
this case, the analog characteristics (output deviation, driving capability, response speed, etc.) will not
change. Please refer to the configuration in the figure below for the actual circuit. Also refer to the same
configuration for the V
COM
voltage input circuit. Current per driver IC is as follws.
V
DD2
V
BIAS1
, V
BIAS2
, V
COM
0.01 F
100 A
MIN.
(per IC)
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