參數(shù)資料
型號(hào): uPD16431AGC-7ET
廠商: NEC Corp.
英文描述: LJT 29C 29#16 SKT PLUG
中文描述: 1 / 2,1 / 3,1/4-DUTY LCD控制器/驅(qū)動(dòng)
文件頁(yè)數(shù): 4/34頁(yè)
文件大?。?/td> 179K
代理商: UPD16431AGC-7ET
μ
PD16431A
4
PIN FUNCTIONS
Symbol
SEG
1
/KS
1
to
SEG
8
/KS
8
SEG
9
to SEG
48
SEG
49
/LED
1
to
SEG
56
/LED
8
COM
1
to COM
4
SCK
DATA
STB
LCD/LED
OE
Note
OSC
IN
OSC
OUT
SYNC
KEY
1
to KEY
4
KEY REQ
V
DD
V
SS
V
LCD
V
EE
V
LC1
to V
LC3
Note
At OE = L, the key data cannot be written correctly, even when the display ON/OFF of the status
command is set to the “normal operation” (10). Also, in this state, unnecessary waveforms are
generated from between SEG
1
/KS
1
to SEG
8
/KS
8
during the key scanning period. (The display is OFF.)
Name
Segment output/key
source output
Segment output
Segment output/LED
output pins
Common output
Shift clock input
Data input/output
Strobe input
LCD/LED select
Output enable input
Oscillation input
Oscillation output
Synchronizing signal
Key data input
Key request output
Logic power supply
Logic GND
LCD drive power supply
LCD GND
Power supply for LCD
drive
No.
25 to 32
33 to 72
73 to 80
21 to 24
7
8
9
10
11
12
13
14
2 to 5
6
15
1
16
20
17 to 19
Description
These pins serve as LCD segment output pins and key
source output pins for key scanning.
LCD segment output pins
These pins can be used as LCD segment output or LED
output pins depending on the setting of the LCD/LED pin.
LCD common output pins
Data shift clock. Data is read at the rising edge, and is
output at the falling edge of this clock.
This pin inputs a command or display data, or outputs
key data.
A command or data is input at the rising edge of the shift
clock, starting from the most significant bit. Key data is
output at the falling edge of the shift clock, starting from
the most significant bit.
This pin serves as an open-drain pin in the output mode.
Data can be input when this signal goes low. When it
goes high, command processing is performed.
When this signal goes high, the SEG
n
/LED
m
pins function
as LCD segment output pins; when it goes low, they
function as LED driver output pins. The LED driver has a
drive capability of 15 mA and is N-ch open drain.
When this signal goes low, all the segment output and
LED output pins are off (SEG
n
= COM
n
= V
LCD
). Internal
data are saved.
Connect a resistor for oscillation circuit across these pins.
A synchronizing signal input pin. When two or more
μ
PD16431A’s are used, each device is wired-ORed. This
pin must be pulled up when this chip is used alone.
Key data input pins for key scanning
This signal goes high when a key is pressed (key data = H).
Read the key data only while this pin is high.
Power supply pin for internal logic
GND pin for internal logic and LED output
Power supply pin for LCD drive
GND pin for LCD drive
Power supply for driving dot matrix LCD
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