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參數(shù)資料
| 型號： | UMA1020M |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | XO, clock |
| 英文描述： | Low-voltage dual frequency synthesizer for radio telephones |
| 中文描述： | PLL FREQUENCY SYNTHESIZER, 2400 MHz, PDSO20 |
| 文件頁數(shù)： | 2/20頁 |
| 文件大?。?/td> | 159K |
| 代理商： | UMA1020M |
1995 Jul 06
2
Philips Semiconductors
Product specification
Low-voltage dual frequency
synthesizer for radio telephones
UMA1020AM
FEATURES
Low current from 3 V supply
Fully programmable RF divider
3-line serial interface bus
Second synthesizer to control first IF or offset loop
frequency
Independent fully programmable reference dividers for
each loop, driven from external crystal oscillator
Dual phase detector outputs to allow fast frequency
switching
Dual power-down modes.
APPLICATIONS
1 to 1.7 GHz mobile telephones
Portable battery-powered radio equipment.
GENERAL DESCRIPTION
The UMA1020AM BICMOS device integrates prescalers,
programmable dividers, and phase comparators to
implement two phase-locked loops. The device is
designed to operate from 3 NiCd cells, in pocket phones,
with low current and nominal 5 V supplies.
The principal synthesizer operates at RF input frequencies
up to 1.7 GHz the auxiliary synthesizer operates at
300 MHz. The auxiliary loop is intended for the first IF or to
transmit offset loop-frequency settings. Each synthesizer
has a fully programmable reference divider. All divider
ratios are supplied via a 3-wire serial programming bus.
Separate power and ground pins are provided to the
analog and digital circuits. The ground leads should be
externally short-circuited to prevent large currents flowing
across the die and thus causing damage. Digital supplies
V
DD1
and V
DD2
must also be at the same potential. V
CC
must be equal to or greater than V
DD
(i.e. V
DD
= 3 V and
V
CC
= 5 V for wider tuning range).
The principal synthesizer phase detector uses two charge
pumps, one provides normal loop feedback, while the
other is only active during fast mode to speed-up
switching. The auxiliary loop has a separate phase
detector. All charge pump currents (gain) are fixed by an
external resistance at pin I
SET
(pin 14). Only passive loop
filters are used; the charge-pumps function within a wide
voltage compliance range to improve the overall system
performance.
QUICK REFERENCE DATA
ORDERING INFORMATION
SYMBOL
PARAMETER
CONDITIONS
V
CC
≥
V
DD
auxiliary synthesizer in
power-down mode
principal and auxiliary
synthesizers ON
MIN.
TYP.
MAX.
UNIT
V
CC
, V
DD
I
CC
+ I
DD
supply voltage
principal synthesizer supply current
2.7
9.4
5.5
V
mA
principal and auxiliary synthesizer
supply current
current in power-down mode per supply
principal input frequency
auxiliary input frequency
crystal reference input frequency
principal phase comparator frequency
auxiliary phase comparator frequency
operating ambient temperature
12.1
mA
I
CCPD
, I
DDPD
f
VCO
f
AI
f
XTAL
f
PPC
f
APC
T
amb
1000
20
3
30
12
1500
200
200
1700
300
40
+85
μ
A
MHz
MHz
MHz
kHz
kHz
°
C
TYPE
NUMBER
PACKAGE
NAME
DESCRIPTION
VERSION
UMA1020AM
SSOP20
plastic shrink small outline package; 20 leads; body width 4.4 mm
SOT266-1
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