參數(shù)資料
型號: UDA1351
廠商: NXP Semiconductors N.V.
英文描述: 96 kHz IEC 958 audio DAC
中文描述: 96千赫音頻DAC東區(qū)走廊958
文件頁數(shù): 9/36頁
文件大?。?/td> 157K
代理商: UDA1351
2000 Feb 18
9
Philips Semiconductors
Preliminary specification
96 kHz IEC 958 audio DAC
UDA1351H
8
FUNCTIONAL DESCRIPTION
8.1
Operating modes
The UDA1351H is a low cost multi-purpose IEC 958 decoder DAC with a variety of operating modes.
In modes 1, 2, 3 and 4 the UDA1351H is clock master; it generates the clock for both the outgoing and incoming digital
data streams. Consequently, any device providing data for the UDA1351H via the data input interface in mode 4 will be
slave to the clock generated by the UDA1351H.
In mode 5 the UDA1351H locks to signal WSI from the digital data input interface. Conforming to IEC 958, the audio
sample frequency of the data input interface must be between 28.0 and 100.0 kHz.
MODE
DESCRIPTION
SCHEMATIC
1
IEC 958 input to the DAC
2
IEC 958 input via the data
output interface to the DSP
3
IEC 958 input to the DAC and
via the data output interface to
the DSP
4
IEC 958 input via the data
output interface to the external
DSP and via the data input
interface to the DAC
5
Data input interface signal to
the DAC
MGS758
CLOCK
DAC
DSP
input
IEC 958
MGS759
CLOCK
DSP
input
IEC 958
MGS760
CLOCK
DAC
DSP
input
IEC 958
MGS761
CLOCK
DAC
DSP
input
IEC 958
MGS762
DAC
DSP
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
UDA1351H 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:96 kHz IEC 958 audio DAC
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