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參數(shù)資料
| 型號： | U2893B |
| 英文描述： | Modulation PLL for GSM, DCS and PCS Systems |
| 中文描述： | 調(diào)制鎖相環(huán)用于GSM，DCS和PCS系統(tǒng) |
| 文件頁數(shù)： | 6/14頁 |
| 文件大?。?/td> | 294K |
| 代理商： | U2893B |
U2893B
TELEFUNKEN Semiconductors
Rev. A1, 29-Jan-76
Preliminary Information
6 (14)
Supply Current of the Charge Pump
i(VSP) vs. Time
Due to the pulsed operation of the charge pump, the cur-
rent into the charge-pump supply pin VSP is not constant.
Depending on I (see figure 6) and the phase difference at
the phase detector inputs, the current i(VSP) over time va-
ries. Basically, the total current is the sum of the quiescent
current, the charge-/discharge current, and – after each
phase comparison cycle – a current spike (see figure 3).
t
I
2I
i(VSP)
i(CPO)
up
down
–2I
t
3I
5I
Figure 3. Supply current of the charge pump = f(t)
Internal current, I, vs. current out of pin CPC
I vs. I(CPC)
CPC open
2.23 kW to GND
743 W to GND
CPC shorted to GND
ICPC
0
–0.5 mA
–1.5 mA
I
CPCK
I
0.5 mA
1.0 mA
2.0 mA
>2.0 mA
Initial Charge Pump Current after
Power-Up
Due to stability reasons, the reference current generator
for the charge pump needs an external capacitor (>500 pF
from CPC to GND). After power-up, only the on-chip
generated current I = I
CPCK
is available for charging the
external capacitor. Due to the charge pump’s architecture,
the charge pump current will be 2
the voltage on CPC has reached the reference voltage
(1.1 V). The following figures illustrate this behavior.
I = 2
I
CPCK
until
The behavior of I(CPO) after power-up can be very
advantageous for a fast settling of the loop. By using
larger capacitors (>1 nF), an even longer period with
maximum charge pump current is possible.
I
V(CPC)
Vref
I
CPCK
R
CPC
t
1
t
0
t
2
t
t
1
2
I
CPCK
I(CPC)
t
Time t
1
can be calculated as t
1
e.g., C
CPC
= 1 nF, I
max
= 3.5 A
Time t
2
can be calculated as t
2
e.g., C
CPC
= 1 nF, R
CPC
= 2230
(1.1 V
t
1
(R
CPC
/2230 )
t
2
C
CPC
)/I
CPCK
0.3 s.
C
CPC
1.1 s
Figure 4.
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