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參數(shù)資料
| 型號(hào)： | TZA1047HL/M2 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP64 |
| 封裝： | 10 X 10 MM, 1.4 MM HEIGHT, PLASTIC, MS-026, SOT314-2, LQFP-64 |
| 文件頁數(shù)： | 14/69頁 |
| 文件大?。?/td> | 324K |
| 代理商： | TZA1047HL/M2 |
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9397 750 14664
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 — 1 June 2005
21 of 69
Philips Semiconductors
TZA1047
Preprocessor IC for CD and DVD rewritable
RFTCOUT is a programmable I to V conversion resistance, set by control word GFTC[1:0].
The parameter
γ is a programmable gain representing the ratio between the satellite and
central segment signals. It is equal to the
γ used in the Distributor and is controlled by
GRAT and word AT[7:0].
The FTC signal is high-pass ltered in order to limit the offset and then low-pass ltered to
suppress noise. The low-pass lter LPF is a second order lter with a target transfer
function Ht(s):
; where QFTC is a lter quality factor.
The lter corner frequency is selectable by FTCF[1:0]. The lter can be bypassed by
setting FTCF to logic 11.
The FTC output can be either an analog AC voltage superimposed on a DC bias level
(FTCSL = 0) or it can be sliced (FTCSL = 1), producing a digital output signal at 3.3 V
CMOS levels. The bias level VFTC(DC) is generated inside TZA1047.
7.9 Push-pull processor
The detailed block diagram of the P-P processor is shown in Figure 9.
Table 8:
FTC Modes
FSEL
CA/PP2
SP3/1
D/F
FTC
0
X
XX3
× RFTCOUT × (FAD + FBC)
10
00RFTCOUT × (FAD FBC)
10
10RFTCOUT × {[FAD + γ× (FF + FH)] [FBC + γ× (FE + FG)]}
11
X
0
RFTCOUT ×γ× (FE + FF FG FH)
1X
X
1
3
× RFTCOUT × (DTDp DTDn)
H
t s
()
1
s
2
ω
0FTC
2
------------------
s
Q
FTC
ω
0FTC
×
------------------------------------
++
-----------------------------------------------------------------------
=
Fig 9.
P-P processor.
001aab185
GAIN
BALANCER
LPF
L
BAL
TBAL
I/V
GPP
BWPP
IPPN
RPPOUT
IPPN
I/V
RPPTST
PPN
R
NORMALIZER
LB
Vc
RB
ppn
0.5
× (LB + RB)
from
Distributor
PPBAL
P-P PROCESSOR
D/A
PPTST1
DACdump
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