參數(shù)資料
型號: TXN132204015C43
廠商: INTEL CORP
元件分類: 光收發(fā)
英文描述: FIBER OPTIC TRANSCEIVER, TRANSPONDER, 1530-1565nm, 10000Mbps(Tx), 10000Mbps(Rx), LC/UPC CONNECTOR
封裝: ROHS COMPLIANT, PACKAGE-300
文件頁數(shù): 30/52頁
文件大?。?/td> 1394K
代理商: TXN132204015C43
Intel TXN13220/1/4/5/7/8 SFF 10 Gbps Optical Transceiver
Intel TXN13220/1/4/5/7/8 SFF 10 Gbps Optical Transceiver
Datasheet
26-Oct-2006
36
Order Number: 273807004
C6
Digital GND
In
Supply
Digital Ground
C7
RxDout6P
Out
LVDS
Receiver (1/16 line bit rate) data output, differential pairs.
C8
RxDout6N
Out
LVDS
Receiver (1/16 line bit rate) data output, differential pairs.
C9
Digital GND
In
Supply
Digital Ground
C10
RxDout7P
Out
LVDS
Receiver (1/16 line bit rate) data output, differential pairs.
C11
RxDout7N
Out
LVDS
Receiver (1/16 line bit rate) data output, differential pairs.
C12
Digital GND
In
Supply
Digital Ground
C13
RxMCLKP
Out
LVDS
Demultiplexer monitor clock output, differential pair, selectable
between 1/64 or 1/16 line bit rate MHz by RxMCLKSEL (B12).
C14
RxMCLKN
Out
LVDS
Demultiplexer monitor clock output, differential pair, selectable
between 1/64 or 1/16 line bit rate MHz by RxMCLKSEL (B12).
C15
Digital GND
In
Supply
Digital Ground
C16
TxDin4P
In
LVDS,internally 100
Ω
terminated
Transmitter (1/16 line bit rate) data input, differential pairs.
C17
TxDin4N
In
LVDS,internally 100
Ω
terminated
Transmitter (1/16 line bit rate) data input, differential pairs.
C18
Digital GND
In
Supply
Digital Ground
C19
TxDin5P
In
LVDS,internally 100
Ω
terminated
Transmitter (1/16 line bit rate) data input, differential pairs.
C20
TxDin5N
In
LVDS,internally 100
Ω
terminated
Transmitter (1/
16
line bit rate) data input, differential pairs.
C21
Digital GND
In
Supply
Digital Ground
C22
TxDin6P
In
LVDS,internally 100
Ω
terminated
Transmitter (1/
16
line bit rate) data input, differential pairs.
C23
TxDin6N
In
LVDS,internally 100
Ω
terminated
Transmitter (1/16 line bit rate) data input, differential pairs.
C24
Digital GND
In
Supply
Digital Ground
C25
TxDin7P
In
LVDS,internally 100
Ω
terminated
Transmitter (1/16 line bit rate) data input, differential pairs.
C26
TxDin7N
In
LVDS,internally 100
Ω
terminated
Transmitter (1/16 line bit rate) data input, differential pairs.
C27
Digital GND
In
Supply
Digital Ground
C28
TxMCLKP
Out
LVDS
Multiplexer monitor clock output, differential pair, 1/64 line bit rate.
C29
TxMCLKN
Out
LVDS
Multiplexer monitor clock output, differential pair, 1/
64
line bit rate.
C30
Digital GND
In
Supply
Digital Ground
D1
Digital GND
In
Supply
Digital Ground
D2
Digital GND
In
Supply
Digital Ground
D3
I2CAD0
In
LVTTL
I2C address input for module addressing (LSB).
D4
Digital GND
In
Supply
Digital Ground
D5
Digital GND
In
Supply
Digital Ground
D6
I2CAD1
In
LVTTL
I2C address input for module addressing.
D7
Digital GND
In
Supply
Digital Ground
D8
Digital GND
In
Supply
Digital Ground
D9
I2CAD2
In
LVTTL
I2C address input for module addressing (MSB).
Table 39. Input and Output Termination Description (Sheet 3 of 9)
Pin
Num-
ber
Symbol
I/O
Logic
Description
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