參數(shù)資料
型號: TXN132204015A41
廠商: INTEL CORP
元件分類: 光收發(fā)
英文描述: FIBER OPTIC TRANSCEIVER, TRANSPONDER, 1530-1565nm, 10000Mbps(Tx), 10000Mbps(Rx), SC/UPC CONNECTOR
封裝: ROHS COMPLIANT, PACKAGE-300
文件頁數(shù): 36/52頁
文件大?。?/td> 1394K
代理商: TXN132204015A41
Intel TXN13220/1/4/5/7/8 SFF 10 Gbps Optical Transceiver
26-Oct-2006
Datasheet
Order Number: 273807004
41
Intel TXN13220/1/4/5/7/8 SFF 10 Gbps Optical Transceiver
H19
Analog GND
In
Supply
Analog Ground
H20
Analog GND
In
Supply
Analog Ground
H21
NIC
N/A
No Internal Connection
H22
Analog GND
In
Supply
Analog Ground
H23
Analog GND
In
Supply
Analog Ground
H24
NIC
N/A
No Internal Connection
H25
Frame GND
In
Supply
Frame Ground
H26
Frame GND
In
Supply
Frame Ground
H27
NIC
N/A
No Internal Connection
H28
Frame GND
In
Supply
Frame Ground
H29
Frame GND
In
Supply
Frame Ground
H30
TxLINETIMSEL In
LVTTL Logic 0: Line
Timing
Logic 1: TxREFCLK
Timing
Line timing mode internally loops recovered receive clock (RxPOCLK)
back to TxREFCLK.
J1
NIC
N/A
No Internal Connection
J2
NIC
N/A
No Internal Connection
J3
NIC
N/A
No Internal Connection
J4
NIC
N/A
No Internal Connection
J5
NIC
N/A
No Internal Connection
J6
NIC
N/A
No Internal Connection
J7
NIC
N/A
No Internal Connection
J8
NIC
N/A
No Internal Connection
J9
NIC
N/A
No Internal Connection
J10
NIC
N/A
No Internal Connection
J11
NIC
N/A
No Internal Connection
J12
NIC
N/A
No Internal Connection
J13
NIC
N/A
No Internal Connection
J14
RxALM INT
Out
open drain/collector Electrical “OR” of all receive alarms.
J15
NIC
N/A
No Internal Connection
J16
TxALM INT
Out
open drain/collector Electrical “OR” of all transmit alarms.
J17
NIC
N/A
No Internal Connection
J18
NIC
N/A
No Internal Connection
J19
NIC
N/A
No Internal Connection
J20
NIC
N/A
No Internal Connection
J21
TxRateSel1
In
LVTTL
Transmit rate select. See Table 34.
J22
NIC
N/A
No Internal Connection
J23
NIC
N/A
No Internal Connection
J24
NIC
N/A
No Internal Connection
J25
NIC
N/A
No Internal Connection
Table 39. Input and Output Termination Description (Sheet 8 of 9)
Pin
Num-
ber
Symbol
I/O
Logic
Description
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