參數(shù)資料
型號(hào)： TWR-MCF51CN-KIT
廠商： Freescale Semiconductor
文件頁(yè)數(shù)： 15/48頁(yè)
文件大小： 0K
描述： KIT TOWER BOARD/SERIAL/ELEVATOR
其它有關(guān)文件： TWR-MCF51CN Schematic
產(chǎn)品培訓(xùn)模塊： MCF51CN Family - Ultimate Ethernet Solutions
Tower System
特色產(chǎn)品： The Tower System
標(biāo)準(zhǔn)包裝： 1
系列： ColdFire®, Flexis™
類(lèi)型： MCU
適用于相關(guān)產(chǎn)品： Freescale 電源塔系統(tǒng)，MCF51CN128
所含物品： 4 個(gè)板，線纜，DVD
產(chǎn)品目錄頁(yè)面： 734 (CN2011-ZH PDF)
配用： TWR-ELEV-ND - TOWER ELEVATOR BOARDS HARDWARE
相關(guān)產(chǎn)品： MCF51CN128CLH-ND - IC MCU 32BIT 128K FLASH 64-LQFP
MCF51CN128CGT-ND - IC MCU 32BIT 128K FLASH 48-QFN
MCF51CN128 ColdFire Microcontroller Data Sheet, Rev. 4
Electrical Characteristics
Freescale Semiconductor
22
8C
Resolution of trimmed DCO output
frequency at fixed voltage and
temperature (not using FTRIM)
Δf
dco_res_t
—
± 0.2
± 0.4
%fdco
9P
Total deviation of trimmed DCO output
frequency over voltage and
temperature
Δf
dco_t
—
+ 0.5
-1.0
± 2
%fdco
10
C
Total deviation of trimmed DCO output
frequency over fixed voltage and
temperature range of 0 - 70
°C
Δf
dco_t
—
± 0.5
± 1
%fdco
11
C FLL acquisition time 2
tfll_acquire
——
1
ms
12
D PLL acquisition time 3
tpll_acquire
——
1
ms
13
C
Long term Jitter of DCO output clock
(averaged over 2ms interval) 4
CJitter
—0.02
0.2
%fdco
14
D VCO operating frequency
fvco
7.0
—
55.0
MHz
15
D Lock entry frequency tolerance5
Dlock
± 1.49
—
± 2.98
%
16
D Lock exit frequency tolerance6
Dunl
± 4.47
—
± 5.97
%
17
D Lock time - FLL
tfll_lock
——
tfll_acquire+
1075(1/fint_t
)
s
18
D Lock time - PLL
tpll_lock
——
tpll_acquire+
1075(1/fpll_r
ef)
s
19
D
Loss of external clock minimum
frequency - RANGE = 0
floc_low
(3/5) x fint
—
kHz
1 TRIM register at default value (0x80) and FTRIM control bit at default value (0x0).
2 This specification applies to any time the FLL reference source or reference divider is changed, trim value changed or changing
from FLL disabled (BLPE, BLPI) to FLL enabled (FEI, FEE, FBE, FBI). If a crystal/resonator is being used as the reference,
this specification assumes it is already running.
3 This specification applies to any time the PLL VCO divider or reference divider is changed, or changing from PLL disabled
(BLPE, BLPI) to PLL enabled (PBE, PEE). If a crystal/resonator is being used as the reference, this specification assumes it is
already running.
4 Jitter is the average deviation from the programmed frequency measured over the specified interval at maximum f
BUS.
Measurements are made with the device powered by filtered supplies and clocked by a stable external clock signal. Noise
injected into the FLL circuitry via VDD and VSS and variation in crystal oscillator frequency increase the CJitter percentage for a
given interval.
5 Below D
lock minimum, the MCG is guaranteed to enter lock. Above Dlock maximum, the MCG does not enter lock. But if the
MCG is already in lock, then the MCG may stay in lock.
6 Below D
unl minimum, the MCG does not exit lock if already in lock. Above Dunl maximum, the MCG is guaranteed to exit lock.
Table 11. MCG Frequency Specifications (continued)(Temperature Range = –40 to 125
°C Ambient)
Num C
Rating
Symbol
Min
Typical
Max
Unit
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TWR-MCF51CN-KIT 制造商:Freescale Semiconductor 功能描述:Tower System - Full Kit Featuring MCF51C
TWR-MCF51JE 功能描述:開(kāi)發(fā)板和工具包 - COLDFIRE MCU Brd for Fsl Towr RoHS:否 制造商:Freescale Semiconductor 產(chǎn)品:Development Kits 工具用于評(píng)估:MCF53017 核心:ColdFire V3 接口類(lèi)型:Ethernet, UART, USB 工作電源電壓:12 V
TWR-MCF51-JE-KIT 制造商:Freescale Semiconductor 功能描述:KIT DEV TOWER MCF51JE 制造商:Freescale Semiconductor 功能描述:TOWER SYS KIT, MCF51JE, TWR-SER/ELEV
TWR-MCF51JE-KIT 功能描述:開(kāi)發(fā)板和工具包 - COLDFIRE KIT MCU Bd Fsl Tower RoHS:否 制造商:Freescale Semiconductor 產(chǎn)品:Development Kits 工具用于評(píng)估:MCF53017 核心:ColdFire V3 接口類(lèi)型:Ethernet, UART, USB 工作電源電壓:12 V
TWR-MCF51JF 功能描述:開(kāi)發(fā)板和工具包 - COLDFIRE MCF51QM Tower Module RoHS:否 制造商:Freescale Semiconductor 產(chǎn)品:Development Kits 工具用于評(píng)估:MCF53017 核心:ColdFire V3 接口類(lèi)型:Ethernet, UART, USB 工作電源電壓:12 V
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