參數(shù)資料
型號(hào)： TWL1102PBSR
廠商： TEXAS INSTRUMENTS INC
元件分類： 消費(fèi)家電
英文描述： SPECIALTY CONSUMER CIRCUIT, PQFP32
封裝： PLASTIC, TQFP-32
文件頁(yè)數(shù)： 5/29頁(yè)
文件大?。?/td> 387K
代理商： TWL1102PBSR
TWL1102
VOICE-BAND AUDIO PROCESSOR (VBAP
)
SLVS264 – NOVEMBER 1999
13
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics at 2.7 V and 25
° C (unless otherwise noted) (continued)
receive idle channel noise and distortion, EAR2 selected, linear mode selected (see Note 13)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Receive noise, (20 Hz to 20 kHz brickwall window)
PCMIN = 0000000000000
–86
–83
dBm0
PCMIN to EAR2O at 3 dBm0
45
60
PCMIN to EAR2O at 0 dBm0
60
65
PCMIN to EAR2O at – 5 dBm0
58
62
Receive signal-to-distortion ratio with 1020-Hz sine-wave input
PCMIN to EAR2O at –10 dBm0
55
60
dB
Receive signal to distortion ratio with 1020 Hz sine wave in ut
PCMIN to EAR2O at – 20 dBm0
53
60
dB
PCMIN to EAR2O at – 30 dBm0
52
58
PCMIN to EAR2O at – 40 dBm0
50
57
PCMIN to EAR2O at – 45 dBm0
45
52
Intermodulation distortion, 2-tone CCITT method, composite power
CCITT G.712 (7.1), R2
50
dB
Intermodulation distortion, 2 tone CCITT method, com osite ower
level, –13 dBm0
CCITT G.712 (7.2), R2
54
dB
NOTE 13. RXPGA = -1 dB, RXVOL = 0 dB
power supply rejection and crosstalk attenuation
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Supply voltage rejection, transmit channel
MIC1N, MIC1P =0 V,
VDD = 2.7 Vdc + 100 mVpeak to peak, f = 0 to 50 kHz
–80
–45
dB
Supply voltage rejection, receive channel,
EAR1 selected (differential)
PCM code = positive zero,
VDD = 2.7 Vdc + 100 mVpeak to peak, f = 0 to 50 kHz
–90
–45
dB
Crosstalk attenuation, transmit-to-receive
(differential)
MIC1N, MIC1P = 0 dB, f = 300 to 3400 Hz measured
differentially between EAR1ON and EAR1OP
70
dB
Crosstalk attenuation, receive-to-transmit
PCMIN = 0 dBm0, f = 300 to 3400 Hz measured at
PCMO, EAR1 amplifier
70
dB
switching characteristics
clock timing requirements
PARAMETER
MIN
NOM
MAX
UNIT
tt
Transition time, MCLK
10
ns
MCLK frequency
2.048
MHz
MCLK jitter
37%
Number of PCMCLK clock cycles per PCMSYN frame
256
tc(PCMCLK) PCMCLK clock period
156
488
512
ns
Duty cycle, PCMCLK
45%
50%
68%
transmit timing requirements (see Figure 6)
PARAMETER
MIN
MAX
UNIT
tsu(PCMSYN)
Setup time, PCMSYN high before falling edge of PCMCLK
20
tc(PCMCLK)–20
ns
th(PCMSYN)
Hold time, PCMSYN high after falling edge of PCMCLK
20
tc(PCMCLK)–20
ns
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TWL1103 制造商:TI 制造商全稱:Texas Instruments 功能描述:VOICE-BAND AUDIO PROCESSOR VBAPE
TWL1103GQE 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Texas Instruments 功能描述:
TWL1103GQER 功能描述:VOICE BAND AUDIO PROC 80-BGA RoHS:否 類別:集成電路 (IC) >> 線性 - 音頻處理 系列:VBAP™ 其它有關(guān)文件:STA321 View All Specifications 標(biāo)準(zhǔn)包裝:1 系列:Sound Terminal™ 類型:音頻處理器 應(yīng)用:數(shù)字音頻 安裝類型:表面貼裝 封裝/外殼:64-LQFP 裸露焊盤 供應(yīng)商設(shè)備封裝:64-LQFP EP（10x10） 包裝:Digi-Reel® 其它名稱:497-11050-6
TWL1103PBS 制造商:Rochester Electronics LLC 功能描述:- Bulk
TWL1103PBSR 制造商:Rochester Electronics LLC 功能描述:- Bulk
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