參數(shù)資料
型號(hào): TWL1102PBS
廠商: TEXAS INSTRUMENTS INC
元件分類: 消費(fèi)家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PQFP32
封裝: PLASTIC, TQFP-32
文件頁數(shù): 23/29頁
文件大?。?/td> 387K
代理商: TWL1102PBS
TWL1102
VOICE-BAND AUDIO PROCESSOR (VBAP
)
SLVS264 – NOVEMBER 1999
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
functional description
power-on/reset
The power for the various digital and analog circuits is separated to improve the noise performance of the
device. An external reset must be applied to the active low RESET terminal to guarantee reset upon power on.
After the initial power-on sequence the TWL1102 can be functionally powered up and down by writing to the
power control register through the I2C interface. There is a hardwired terminal selectable power up in default
mode option. The PWRUPSEL function allows the VBAP to power up in the default mode and allows use without
a microcontroller.
reference
A precision band gap reference voltage that is generated internally supplies all required voltage references to
operate the transmit and receive channels. The reference system also supplies bias voltage for use with an
electret microphone at terminal MBIAS. If MBIAS is turned off by selecting MICBIAS power down in the power
control register, the MBIAS terminal becomes a digital output signal for an external MIC_OFF function. An
external precision resistor is required for reference current setting at terminal REXT.
control interface
The I2C interface is a two-wire bidirectional serial interface that controls the VBAP by writing data to six control
registers: 1) power control, 2) mode control, 3) transmit PGA and sidetone control, 4) receive PGA gain and
volume control, 5) DTMF high tone, 6) DTMF low tone.
There are two power-up modes which may be selected at the PWRUPSEL terminal: 1) The PWRUPSEL state
(Vdd at terminal 20) causes the device to power up in the default mode when power is applied. In the default
mode the I2C interface is not required and the device may be used without an I2C interface. The programmable
functions will be fixed at the default modes. 2) The PWRUPSEL state (ground at terminal 20) causes the device
to go to a power-down state when power is applied. In this mode an I2C interface is required to power up the
device.
phase-locked loop
The internal digital filters and modulators require a 10.24-MHz clock that is generated by phase locking to the
2.048-MHz master clock input.
PCM interface
The PCM interface transmits and receives data at the PCMO and PCMI terminals respectively. The data is
transmitted or received at the PCMCLK speed once every PCMSYN cycle. The PCMCLK may be tied directly
to the 2.048-MHz master clock (MCLK). The PCMSYN can be driven by an external source or derived from the
master clock and used as an interrupt to the host controller.
microphone amplifiers
The microphone input is a switchable interface for two differential microphone inputs. The first stage is a low
noise differential amplifier that provides a gain of 23.5 dB. The second stage amplifier has a selectable gain of
0 dB or 12 dB.
analog modulator
The transmit channel modulator is a third-order sigma-delta design.
transmit filter and PGA
The transmit filter is a digital filter designed to meet CCITT G.714 requirements. The device operates in either
the 15-bit linear or 8-bit companded
-law or A-law mode that is selectable through the I2C interface. The
transmit PGA defaults to 0 dB.
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